Vendor: Xilinx, Inc. Category: Ethernet

Tri-Mode Ethernet Media Access Controller (TEMAC)

The TEMAC core is ideally suited for the development of high density Gigabit Ethernet communications and storage equipment.

Overview

The TEMAC core is ideally suited for the development of high density Gigabit Ethernet communications and storage equipment.

The Xilinx Tri-Mode Ethernet MAC core is a parameterizable core ideally suited for use in networking equipment such as switches and routers. The customizable TEMAC core enables system designers to implement a broad range of integrated Ethernet designs, from low cost 10/100/1000 Mbps Ethernet to higher performance 2.5 Gigabit ports. The TEMAC core is designed to the IEEE 802.3 specification and operates in 2500 Mbps, 1000Mbps, 100 Mbps, and 10 Mbps modes. In 1000/2500Mbps mode, the TEMAC connects to the Xilinx 1/G2.5G PCS/PMA. In 1000 Mbps mode, the TEMAC core can also connect with industry standard PHY devices. In 10/100 Mbps mode, the TEMAC uses the MII interface. The Xilinx Tri-Mode Ethernet MAC, combined with the Ethernet 1G/2.5G PCS/PMA or SGMII core, provides a complete and highly flexible solution for the implementation of Ethernet Link and Physical layers and is available as a single IP through AXI 1G/2.5G Ethernet. The TEMAC core is delivered through Vivado Design Suite and is part of the comprehensive suite of Xilinx Ethernet solutions.    

Key features

  • Designed to IEEE 802.3-2012 specification
  • Supports 10/100/1000/2500 Mbps Ethernet
  • Configurable half-duplex and full-duplex operation
  • Configured and monitored through an optional independent microprocessor-neutral interface
  • Configurable flow control through MAC Control pause frames; symmetrically or asymmetrically enabled
  • Optional MDIO interface to managed objects in PHY layers (MII Management)
  • Optional clock enables to reduce clock resource usage
  • Support of VLAN frames to specification IEEE 802.3-2005
  • Optional address filter with a selectable number of address table entries
  • Configurable support of jumbo frames of any length
  • Configurable inter-frame gap adjustment
  • Configurable in-band FCS field passing on both transmit and receive paths
  • Ethernet AVB and Ethernet Statistics integrated with TEMAC

Specifications

Identity

Part Number
EF-DI-TEMAC-SITE EF-DI-TEMAC-PROJ
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about Ethernet IP core

Designing with Virtex-5 Embedded Tri-Mode Ethernet MACs

In this article, we’ll review the feature set of Ethernet MAC blocks in Virtex-5 devices. We’ll also describe the differences between Virtex-5 and Virtex-4 FX Ethernet MACs, illustrate some potential applications, and describe how to use standard Xilinx tools to integrate an Ethernet MAC into your design.

Designing FPGA Based Reliable Systems Using Virtex-5 System Monitor

The fast track development and 24x7 operations have put tremendous pressure on the servers, networking systems and communication equipments. It has become necessary that these systems should operate reliably irrespective of the change in external operating environment like the temperature, humidity, and power fluctuations or, on chip conditions like on-chip temperature, internal voltage levels etc. Measuring the reliability of these physical systems is must for every operational unit.

Frequently asked questions about Ethernet IP cores

What is Tri-Mode Ethernet Media Access Controller (TEMAC)?

Tri-Mode Ethernet Media Access Controller (TEMAC) is a Ethernet IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Ethernet?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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