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Vendor:
ChipCraft
Category:
Timers & Watchdogs
Configurable System Tick Counter
The CC-SYSTICK-APB is a synthesisable Verilog model of a system tick timer counter controller.
Overview
The CC-SYSTICK-APB is a synthesisable Verilog model of a system tick timer counter controller. The SYSTICK core can be efficiently implemented on FPGA and ASIC technologies.
Key features
- AMBA APB3 bus
- Programmable system tick timer
- Configurable prescaler and period
- Configurable interrupts
- Stop in debug mode option
- Fully synthesizable synchronous design with positive edge clocking
- DFT ready
Block Diagram
CC-SYSTICK-APB block diagram
Benefits
- Synthesizable RTL Verilog source code
- Technology independent IP Core
- Suitable for FPGA and ASIC
- Silicon and FPGA proven
- Easy SoC integration
- Full implementation and maintenance support with individual approach
- Flexible licensing scheme
What’s Included?
- Verilog RTL source code
- Verification suite
- Datasheet and integration guide
- C-header file
- Constraints
- Technical support
Specifications
Identity
Part Number
CC-SYSTICK-APB
Vendor
ChipCraft
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Poland
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Frequently asked questions about Timers & Watchdogs IP cores
What is Configurable System Tick Counter?
Configurable System Tick Counter is a Timers & Watchdogs IP core from ChipCraft listed on Semi IP Hub.
How should engineers evaluate this Timers & Watchdogs?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Timers & Watchdogs IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.