Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Single-Protocol PHY

SMIC 65nm Low Leakage LVDS Receiver

The LVDS Receiver converts up to 10 pairs of LVDS data streams into 70-bit of CMOS data and then feeds the data to the logic core…

Overview

The LVDS Receiver converts up to 10 pairs of LVDS data streams into 70-bit of CMOS data and then feeds the data to the logic core that can support Single-Link transmission with up to SXGA+ resolution, or Dual-Link transmission with up to UXGA resolution. This IP is suitable for Flat Panel Display applications.

Key features

  • Process: SMIC 65nm Logic Low Leakage 1P7M 1.2V/2.5V
  • LVDS input: Single-Link or Dual-Link; 5-channel data + 1-channel clock for each link
  • Compatible with the TIA/EIA-644 LVDS standards
  • Logic output: total 70-bit data outputs aligned with one clock output
  • Clock range: 20M ~ 93MHz (for each link)
  • Data rate: 140M ~ 650Mbps (Single-Link) or 280M ~ 1.3Gbps (Dual-Link)
  • On-chip DLL supports SSC input clock
  • \Individual power-down control for each link
  • Fail-safe for un-driven channels and automatic restore
  • Operating junction temperature: -40 ~ +125 °C

Silicon Options

Foundry Node Process Maturity
SMIC 65nm LL

Specifications

Identity

Part Number
S65LLV25_LVDSRX_02
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

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Frequently asked questions about Single-Protocol PHY IP

What is SMIC 65nm Low Leakage LVDS Receiver?

SMIC 65nm Low Leakage LVDS Receiver is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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