Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: PLL

SMIC 65nm LL 1.2v/2.5v APLL

This IP is a programmable Analog PLL suitable for high speed clock generation.

Overview

This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM [3:0] and DN [6:0] to different values according to different CLKIN, CLK will be locked at the multiples of input frequency.

Key features

  • Process: SMIC 65nm LL Logic 1P8M 1.2V/2.5v CMOS process
  • Supports 4.00.00 or above metal stack
  • Supports the following types of Mos device : nfet, pfet, dgnfet, dgpfet
  • Supply voltage: 1.08v~1.2v~1.32v/2.25v~2.5v~2.75v
  • Operating junction temperature: - 40°C ~ +25°C ~ +125°C

Silicon Options

Foundry Node Process Maturity
SMIC 65nm LL —

Specifications

Identity

Part Number
S65LLV25_PLL_02
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about PLL IP core

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Frequently asked questions about PLL IP cores

What is SMIC 65nm LL 1.2v/2.5v APLL?

SMIC 65nm LL 1.2v/2.5v APLL is a PLL IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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