HBM IP Listing

HBM2E Synthesizable Transactor provides a smart way to verify the HBM2E component of a SOC or a ASIC in Emulator or FPGA platform.

• Controller

HBM2E DFI Synthesizable Transactor provides a smart way to verify the HBM2E DFI component of a SOC or a ASIC in Emulator or FPGA …

• Controller

HBM3 interface provides full support for the HBM3 interface, compatible with draft JEDEC specification version 1.02 and DFI-versi…

• Controller

HBM2E is full-featured, easy-to-use, synthesizable design, compatible with HBM2E JESD235B and JESD235C with revision 4.10 specifi…

• Controller

HBM2 is full-featured, easy-to-use, synthesizable design, compatible with HBM2 JESD235 and JESD235A specification and DFI-version…

• Controller

HBM2E and HBM2 are high-performance memory IPs that offer a combination of high memory bandwidth, low power consumption, low late…

• Controller

DFI HBM2E Assertion IP provides an efficient and smart way to verify the DFI HBM2E designs quickly without a testbench.

• Controller

HBM3 Assertion IP provides an efficient and smart way to verify the HBM3 designs quickly without a testbench.

• Controller

HBM2E Assertion IP provides an efficient and smart way to verify the HBM2E designs quickly without a testbench.

• Controller

Bandwidth and area optimized low power memory interface solution tuned for AI, HPC, data centers and networking conforming to HBM…

• Controller + PHY
• TSMC
• 7nm
• N7

Synopsys offers a HBM4 PHY IP solution for high-performance computing (HPC), AI, graphics, and networking ASIC, Application-Speci…

• PHY

The Synopsys HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard.

• Controller

IGAHBMZ03A is a High Bandwidth Memory 4 Physical Layer (HBM4 PHY) that is compliant with JEDEC HBM4 DRAM Specification JESD270-4.

• Controller + PHY + 1
• TSMC
• 3nm
• N3FFP
• Silicon Proven

IGAHBMX03A is a HBM3 (High Bandwidth Memory) PHY IP compliant to the JEDEC HBM3 DRAM Specification Rev 0.95.

• Controller + PHY + 1
• TSMC
• 7nm
• N7FF

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1
• TSMC
• 3nm
• N3E

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1
• TSMC
• 3nm
• N3P

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1
• TSMC
• 6nm
• N6

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1
• TSMC
• 6nm
• N6

The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…

• Controller + PHY + 1