UCIe Die-to-Die Chiplet Controller
The UCIe Controller IP is a configurable and customizable UCIe 1.1 compliant die-to-die controller.
- UCIe
- Available on request
- UCIe 1.1
UCIe Die-to-Die Chiplet Controller
The UCIe Controller IP is a configurable and customizable UCIe 1.1 compliant die-to-die controller.
Our Standard Cell Libraries are designed to meet the rigorous demands of modern semiconductor applications, including automotive,…
The SERDES PHY IP delivers a high-performance, low-power solution for high-speed interfaces up to 112Gbps.
Whether deployed in-cabin for driver distraction or in the driver assistance system (ADAS) stack for object recognition and point…
These eFPGA IP cores offer designers the flexibility to tailor resources to their application requirements, available as either S…
Safety Enhanced GPNPU Processor IP
Automotive applications are uniquely demanding for any AI acceleration solution.
Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture.
High-Performance Memory Expansion IP for AI Accelerators
AI inference performance is increasingly constrained by memory bandwidth and capacity - not compute.
CXL - Enables robust testing of CXL-based systems for performance and reliability
CXL Verification IP is a cutting-edge solution for validating designs based on the Compute Express Link (CXL) protocol.
E-Series GPU IP delivers fast and flexible parallel compute that scales from wearables to the cloud.
RISC-V-Based, Open Source AI Accelerator for the Edge
Coral NPU is a machine learning (ML) accelerator core designed for energy-efficient AI at the edge.
Neural engine IP - AI Inference for the Highest Performing Systems
From data centers to autonomous cars, the most demanding AI applications need high-performance NPUs with the lowest possible late…
Run-time Reconfigurable Neural Network IP
The Dynamic Neural Accelerator II (DNA-II) is a -efficient and neural network IP core that can be paired with any host processor.
The Ceva-NeuPro-Nano is a efficient and self-sufficient Edge NPU designed for Embedded ML applications.
Tensilica AI Max - NNA 110 Single Core
Single-core neural network accelerator offering from 0.5 to 4 TOPS Optimized for machine learning inference applications The Cade…
Introducing Gyrus's ground-breaking AI Processor Accelerator IP, coupled with a native graph processing software stack, is the ul…
ChaCha20 DPA Resistant Crypto Accelerator
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integra…
eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
RapidFlex eFPGA IP provides a reconfigurable, upgradeable, and iterative logic computing layer for SoCs, MCUs, AI accelerators, i…
NPU IP for Data Center and Automotive
The VIP9400 processing family offers programmable, scalable and extendable solutions for markets that demand real time and AI dev…
Data Movement Engine - Turnkey network compute subsystem for data movement applications.
Physical AI platforms interpret their surroundings using a diverse array of sensors, generating data that must be seamlessly tran…