PCIe error logging and handling on a typical SoC
This paper details first PCIe errors, error logging and then the error handling on a typical SoC.
Vendor:
Truechip Solutions
Category:
CPU
RI5CY Verification IP
The RI5CY Verification IP provides an effective & efficient way to verify the components interfacing with RI5CY bus of a PULP mic…
Overview
The RI5CY Verification IP provides an effective & efficient way to verify the components interfacing with RI5CY bus of a PULP microprocessor. It is fully compliant with standard RI5CY specification from Integrated Systems Lab, Inc. This VIP is a lightweight VIP with an easy plug-and-play interface so that there is no hit on the design cycle time.
Key features
- Compliant to RI5CY specification for PULPmicroprocessor cores provided byIntegrated Systems Lab, Inc.
- Supports all type of RI5CY agents: RI5CY Master and RI5CY Slave.
- Wide range of protocol checks.
- Slave Memory preload and checks.
- Bus assertions for all possible scenarios.
- Can also be used with data caches to boost read and write performance.
- Supports instruction interface and data interface.
- All parameter widths such as Read/Write Data, Address and Byte enable are configurable.
- Controllable gnt assertion with weighted constraints.
- Multiple modes for gnt signalling such as always high, wait for req etc.
- Supports Misaligned data access.
- Supports slave memory preloading via memory file.
- Support endianness checks and conversion.
- Supports UVM_RAL model.
- Provides detailed statistics for each transaction.
- Provides a comprehensive user API (callbacks) in all BFMs.
Block Diagram
RI5CY block diagram
Benefits
- Available in native SystemVerilog, UVM and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of Compliance & Regression Test Suites
- Exhaustive set of assertions and cover points with connectivity example for all the components.
- Consistency of interface, installation, operation and documentation across all our VIPs
- 24X5 customer support
- Unique and customizable licensing models
What’s Included?
- RI5CY Master/Slave Agent.
- RI5CY Bus Monitor, assertion module and Scoreboard.
- Test Environment and Test Suite:
- Basic and directed protocol tests.
- Random Tests.
- Error Scenario Tests.
- Assertion and cover-point Tests
- Integration guide, User Manual, FAQ, and Release Notes.
Specifications
Identity
Part Number
RI5CY
Vendor
Truechip Solutions
Type
Verification IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about CPU IP cores
What is RI5CY Verification IP?
RI5CY Verification IP is a CPU IP core from Truechip Solutions listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.