Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Single-Protocol PHY

LVDS receiver, 650M, 5 channel

The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…

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SMIC 180nm G View all specifications

Overview

The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link transmission between Host and Flat Panel Display with up to UXGA resolution. The LVDS Receiver IP converts the LVDS data streams back into 70bits of CMOS/TTL data with a variety of LCD panel controllers.

Key features

  • Function compatible with the National DS90CF386
  • Converts 5-pair LVDS data streams into parallel 35 bits of CMOS/TTL data
  • Converts 10-pair LVDS data streams into parallel 70 bits of CMOS/TTL data with double channel
  • Wide dot clock range: 25-170MHz suited for VGA, SVGA, XGA, SXGA, SXGA+ and UXGA
  • Supports Dual Link at up to 170MHz dot clock for UXGA
  • On-chip DLL requires no external component
  • Low-power CMOS design
  • Power-down control function
  • Compatible with TIA/EIA-644 LVDS standards
  • Full industrial operating temperature range -40 ~ +85 °C
  • SMIC 0.18um Logic Salicide Process (1p4m, 1.8V/3.3V)
  • Off chip 100ohm resistances between receiver’s positive input and negative input
  • Negative clock edge for data output

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G —

Specifications

Identity

Part Number
SMIC18_LVDSRX _02
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Contact VeriSilicon Microelectronics (Shanghai) Co., Ltd.

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Frequently asked questions about Single-Protocol PHY IP

What is LVDS receiver, 650M, 5 channel?

LVDS receiver, 650M, 5 channel is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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