Vendor: Brisbane Silicon Category: CPU

Highly customizable processor IP supporting the Lua scripting language

A highly customizable processor IP, that supports the Lua scripting language.

Overview

A highly customizable processor IP, that supports the Lua scripting language.

Key features

Native execution of the Lua scripting language, including

  • REPL
  • Non-volatile program storage
  • Rich, full featured API
    • Constants
    • Functions
    • Interrupts

Build-time configurable, including:

  • Number of supported processor cores (maximum of eight)
  • Stack / Heap size, per core
  • Support for a configurable number and type of digital I/O protocols (GPIO, PWM, SPI etc)
  • Support for an FPGA fabric bus
  • Support for inter-core communication
  • Support for inter-core synchronization
  • Support for timers, hardware watchdogs and interrupts

Run-time configurable, including:

  • Digital I/O Pin type (i.e. GPIO, UART, SPI etc)
  • API
  • Interrupts
  • Timers

Each processor core is heterogeneous

Ultra-small footprint (minimal configuration) of only 1750 LUTs (AMD / Xilinx 28nm fabric) and 5 BRAM (20 kB)

Clock frequency up to 500 MHz (AMD / Xilinx 16nm fabric)

Simple UART-based user interface

Block Diagram

Specifications

Identity

Part Number
embLua
Vendor
Brisbane Silicon
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Australia

Learn more about CPU IP core

Frequently asked questions about CPU IP cores

What is Highly customizable processor IP supporting the Lua scripting language?

Highly customizable processor IP supporting the Lua scripting language is a CPU IP core from Brisbane Silicon listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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