Brisbane Silicon publishes DPTx 1.4 IP Core
April 19, 2024 -- Today we are very excited to announce that Brisbane Silicon will add a DPTx 1.4 IP core to its IP library suite. A summary of this IP:
- DisplayPort 1.4 compatible.
- Ultra-small footprint (1k LUT minimum, 3.5k LUT maximum).
- Hardware proven on AMD/Xilinx 28nm FPGA fabric.
- Ships with an example project which demonstrates the following:
- Link initialization at 5.4 Gbps.
- Initialization of the DPTx core.
- Output a test video pattern with 4k60 framing.
- Commercial or Academic licenses available.
The hardware target for the example project is the Numato Mimas A7 FPGA Development board. See here for further information on this board.
For more information on the DPTx IP core, see the product summary available here.
Related Semiconductor IP
- DisplayPort 1.4 FEC Transmitter (Tx) ASIL-B
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- DisplayPort 1.4 FEC Receiver (Rx)
- DisplayPort 1.4 TX PHY, TSMC N7, North/South Poly Orientation
- DisplayPort 1.4 TX PHY, TSMC N5, North/South Poly Orientation
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