USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
- USB 3.1
- Samsung
- 14nm
- Available on request
Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1/DP TX PHY in TSMC (16nm, 12nm, N7, N6)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
The multi-channel PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across back…
Accelerates AI and Hyperscale Data Center Applications The 112G Ultra-Long-Reach (ULR) SerDes PHY delivers exceptional long-reach…
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a …
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a set of fe…
28G LR Ethernet PHY in Samsung (SF5A)
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high…
SATA 6G PHY in GF (40nm, 28nm)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
The USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF).
USB-C 3.2 SS/SSP PHY in Type-C in Samsung (SF4X, SF4E, SF2)
The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum.
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a physical (PHY) layer IP solution for low-power mobile an…
USB 2.0 picoPHY in GF (40nm, 28nm)
The Synopsys USB 2.0 picoPHY provides designers with a physical (PHY) layer IP solution, designed for low power mobile and consum…
The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…
USB 2.0 femtoPHY in GF (28nm, 22nm, 12nm)
The Synopsys IP USB 2.0 femtoPHY provides designers with a physical (PHY) layer IP solution for low-power mobile and consumer app…
USB 2.0 femtoPHY in GF (22nm) for Automotive Grade 1
The Synopsys IP USB 2.0 femtoPHY provides designers with a physical (PHY) layer IP solution for low-power mobile and consumer app…
USB 2.0 femtoPHY in TSMC (16nm, N7) for Automotive
The Synopsys IP USB 2.0 femtoPHY provides designers with a physical (PHY) layer IP solution for low-power mobile and consumer app…
eUSB 2.0 PHY in TSMC (N5, N4P, N3E, N3P)
Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-…
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power