Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Single-Protocol PHY

IBM 65nm USB2.0 Dual Role PHY

The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.

USB 2.0 IBM 65nm LPe View all specifications

Overview

The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog front-end with a build-in 8-bit/16-bit parallel interface, therefore, it is easy to interface with USB2.0 Device System. It can work either as a host PHY or as a device PHY, depending on the different setting from controller.

Key features

  • Compliant with the USB Spec Rev2.0
  • Compliant with the UTMI Spec Rev1.05
  • Supports 480Mbit/s “High Speed” and 12Mbit/s “Full Speed”
  • Supports 60MHz/8-bit unidirectional interface and 30MHz/16-bit bidirectional interface
  • 12MHz/24MHz external crystal, internal oscillator and PLL are used for generating high-speed internal clock and CLKOUT output
  • Internal terminations include 1.5Kohm pull-up resistor switching on DP/DM in the FS mode and the HS chirp mode
  • Clock and data recovery from serial stream on the USB bus
  • Supports detection of USB reset, suspend, resume and remote-wake-up features
  • Supports the test modes defined in the USB2.0 Specification
  • NRZI and Bit Stuff encoding and decoding
  • Supports low/full speed serial mode
  • Works as host PHY or device PHY by setting DPPULLDOWN and DMPULLDOWN
  • Process: IBM 65nm LPE process
  • Supply voltage: 1.08v~1.2v~1.32v, 2.25v~2.5v~2.75v, 2.97v~3.3v~3.63v
  • Current consumption: < 50mA
  • Operating temperature: - 40°C ~ +25°C ~ +125°C

Silicon Options

Foundry Node Process Maturity
IBM 65nm LPe —

Specifications

Identity

Part Number
I65LPEV25_USB20PHY_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 2.0

Provider

Learn more about Single-Protocol PHY IP core

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Frequently asked questions about Single-Protocol PHY IP

What is IBM 65nm USB2.0 Dual Role PHY?

IBM 65nm USB2.0 Dual Role PHY is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for ibm.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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