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IP for TSMC

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Compare 24 IP for TSMC from 3 vendors (1 - 10)
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  • 2nm
  • PVT Sensor on TSMC CLN2P
    • The PVT Sensor is a highly integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high precision even in untrimmed usage.
    • It consumes very little power even in operational mode, and leakage power only when temperature measurement is complete.
    Block Diagram -- PVT Sensor on TSMC CLN2P
  • Core Powered Wide Range Programmable Integer PLL on TSMC CLN2P
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Entirely core voltage powered, needs no analog supply voltage
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Core Powered Wide Range Programmable Integer PLL on TSMC CLN2P
  • 18-40MHz Crystal Oscillator on TSMC CLN2P
    • Crystal Oscillator pad macro that supports industry standard crystals
    • Uses standard CMOS transistors
    • Crystal Oscillation Mode: Fundamental
    • Power down option for IDDQ testing
    Block Diagram -- 18-40MHz Crystal Oscillator on TSMC CLN2P
  • Standard Cell
    • Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported.
    • More than 3500 fully customizable cells are available, and each has been optimized for speed, routability, power and density, in order to maximize performance and wafer yield while lowering overall SoC cost.
  • I/O Library
    • Dolphin Technology offers an extensive array of Interface IP, all of whichhasbeen optimized for ultra high performance across all processes supported.
    • Our I/O portfolio includes: Standard I/O (General Purpose I/O or GPIO), Specialty I/O (bus-specific I/O), NAND Flash I/O and DDRx & LPDDRx I/O.
  • Memory Compilers
    • Dolphin provides a wide range of Memory Compilers and Specialty Memory (ROM, Multi Port RF, CAM, etc.) optimized to meet even the most demanding requirements for high performance, high density and low power.
  • TSMC N2P 0.75V/1.2V GPIO MS add-on
    • Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
    • The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
    • Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
    • The library is compatible with flip-chip packaging
  • TSMC N2P 0.75V/1.2V GPIO
    • Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
    • The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
    • Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
    • The library is compatible with flip-chip packaging
  • TSMC N2P 1.2V Fail-safe GPIO
    • Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
    • The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
    • Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
    • The library is compatible with flip-chip packaging
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