S2C Named Andes Technology’s 2026 Partner of the Year
本月，头部数字EDA企业思尔芯宣布，荣获RISC-V处理器IP领导厂商Andes晶心科技（Andes Technology）颁发的“2026年度最佳合作伙伴”奖项。该荣誉旨在表彰思尔芯在RISC-V生态共建、原型验证平台支撑及联合市场拓展中与Andes晶心深度协同、持续创造客户价值的突出表现。
Vendor:
Andes Technology Corp.
Category:
CPU
Entry-level Low-Power 32-bit Processor
N705 is an ultra low-power small-size synthesizable general purpose 32-bit softcore embedded processor.
Overview
N705 is an ultra low-power small-size synthesizable general purpose 32-bit softcore embedded processor. With competitive small core size, high power-efficiency and small code size of the V3m ISA, it is the best candidate to replace 8051 and other 8-bit MCUs for small-footprint, cost and power sensitive applications.
For ease of integration in SoC design, it is delivered with a complete softcore development package as well as reference design flow to fit the requirements in all aspects of performance, power consumption, and cost. In addition, N705 is supported by user-friendly development tools, size-optimized MCU libraries and 2-wire low-cost ICE debugger.
For ease of integration in SoC design, it is delivered with a complete softcore development package as well as reference design flow to fit the requirements in all aspects of performance, power consumption, and cost. In addition, N705 is supported by user-friendly development tools, size-optimized MCU libraries and 2-wire low-cost ICE debugger.
Key features
- Seamless migration to full 32-bit environment from 8/16-bit MCUs
- Low power consumption for extended battery life
- Small footprint with low gate count and high code density
- Speed-up and power reduction for Flash accesses by FlashFetch technology
Block Diagram
AndesCore ™ N705 block diagram
Benefits
- Performance
- 16/32bit mixable instruction format for compacting code density
- Low-latency vectored interrupt for real-time performance
- Single-cycle capable for most Local Memory and AHB bus accesses
- FlashFetch™ technology to accelerate internal parallel and/or external SPI flash memory
- Flexibility
- All-C Embedded Programming
- Stack protection hardware to help determining stack size needed, and
- detect runtime overflow error
- Processor state bus to simplify SoC design and debugging
- Support boot-up from Inst. local memory
- Power Management
- Low power modes initiated by SW or SoC
- N:1 core/bus clock ratios
Applications
- Medical devices
- Smart energy monitor and control
- Home security and remote control
- Gas/water/Electronic metering
- Internet of Things (IOT)
- Sensor Fusion
Specifications
Identity
Part Number
AndesCore ™ N705
Vendor
Andes Technology Corp.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
R.O.C
Learn more about CPU IP core
Andes Technology Honors Quintauris as 2026 Partner of the Year
This award recognizes Quintauris’ exceptional dedication to develop reference architectures and advancing mass-market commercialization for the RISC-V ecosystem with Andes.
Andes Technology Empowers RISC-V Developers with Its New Streamlined IDE, RVBuilder
Based on Visual Studio Code (VS Code), it is integrated, lightweight, and designed to streamline the development experience by bringing Andes’ industry-leading toolchain and advanced debugging capabilities directly into the most popular integrated development environment (IDE).
Andes Technology’s D23-SE RISC-V Processor Achieves ISO 26262 ASIL‑B and ASIL‑D Certification for Functional Safety Applications
Built upon the production-proven D23 architecture, the 32-bit D23-SE processor is specifically engineered for safety-critical systems requiring deterministic performance, robust security mechanisms, and accelerated SoC compliance workflow.
Andes Technology Unveils Next-Generation AI Solutions: AndesAIRE™ AnDLA™ I370 v2.0 and NN SDK v1.2.0 for Advanced ViT, VLM, and SLM at the Edge
This milestone release addresses one of the industry’s most challenging hurdles: enabling resource-heavy Transformer architectures such as Vision Transformers (ViT), Vision-Language Models (VLMs), and Small Language Models (SLMs) to execute efficiently on power- and cost-constrained edge platforms.
Andes Technology and Mirabilis Design Announce Collaboration on System-Level Models for Andes RISC-V Processor IP
Validated Architecture Models Enable Early Design Exploration and Pre-RTL Optimization
Frequently asked questions about CPU IP cores
What is Entry-level Low-Power 32-bit Processor?
Entry-level Low-Power 32-bit Processor is a CPU IP core from Andes Technology Corp. listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.