Vendor: StarIC Inc Category: Single-Protocol PHY

Die-to-Die / Short-Reach SerDes

32 Gbps UCIe-class links with CTLE and CTLE+DFE on GF Fotonix™, under development

Overview

Short-reach SerDes IP for chiplet-to-chiplet connectivity on monolithic electro-photonic platforms. Under development. Complementary WDM photonics IP also in progress for complete electro-photonic chiplet solutions for the AI era.

Key features

  • 32 Gbps data rate
  • CTLE and CTLE+DFE variants
  • GF Fotonix™ platform
  • Under development

Applications

  • Chiplet interconnect
  • UCIe-class links
  • Co-packaged optics
  • AI accelerator fabrics

What’s Included?

  • GDS layout database
  • Liberty timing models (.lib)
  • LEF layout exchange format
  • Documentation available
  • Integration support package

Specifications

Identity

Part Number
die-to-die-serdes
Vendor
StarIC Inc
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Canada

Learn more about Single-Protocol PHY IP core

StarIC Appoints Dr. Masum Hossain as Chief Technology Officer

In this role, Dr. Hossain will lead the company's technology vision and architecture for high-speed interconnects and silicon photonics as StarIC scales to meet surging global demand for AI, data center, and high-performance computing infrastructure.

Frequently asked questions about Single-Protocol PHY IP

What is Die-to-Die / Short-Reach SerDes?

Die-to-Die / Short-Reach SerDes is a Single-Protocol PHY IP core from StarIC Inc listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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