CSMC 0.13um USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial…
Overview
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives data via DP and DM and transfers data to USB1.1 core via RCV, VM and VP, capable of transmitting and receiving serial data at either full speed (12M bit/s) or low speed (1.5M bit/s) data rate. The serial interface engine (SIE) controls the state of USB1.1 PHY through the OEN signal. When in receiving mode, it receives data at the USB1.1 PHY output RCV, VM and VP; when in transmitting mode, it drives the USB1.1 PHY input VPO and VMO.
Key features
- Complies with the USB1.1 standard
- CSMC 0.13um, 1.2v/3.3v power supply, 1P6M logic process
- Uses digital input/output to transmit or receive USB cable data
- Supports 12Mbit/s full speed and 1.5Mbit/s low speed serial data transmission
- Supports single-ended data interface
- Built-in Level Shift
- Built-in 1.5K pull-up and 15K pull-down resistors, with selectable connection with DP or DM
- Operating junction temperature: -40°C~+25°C~+125°C
Specifications
Identity
Standards & Interfaces
Provider
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Frequently asked questions about Single-Protocol PHY IP
What is CSMC 0.13um USB 1.1 PHY?
CSMC 0.13um USB 1.1 PHY is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.