What is CSMC 0.13um 1.2v/3.3v APLL?
CSMC 0.13um 1.2v/3.3v APLL is a PLL IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
PLL
CSMC 0.13um 1.2v/3.3v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
Overview
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 100MHz to 300MHz. It contains a 1-32 input clock divider, a 1-64 feedback clock divider and a 1-8 output clock divider. By setting DM [4:0], DN [5:0] and DP [2:0] to different values according to different REFIN, CLK and CLKO will be locked at the multiples of the input frequency.
Key features
- Process: CSMC 0.13um Logic 1P8M 1.2v/3.3v CMOS process
- Supply voltage: 1.2v±10%, 3.3v±10%
- Current: <3mA
- Operating junction temperature: - 40°C ~ +25°C ~ +125°C
- Two output clocks: - CLKO: standard output from the output divider /- CLK: output from the VCO directly
Specifications
Identity
Part Number
CS13V33_PLL_03
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Provider
Frequently asked questions about PLL IP cores
How should engineers evaluate this PLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.