Vendor: Silvaco, Inc. Category: Bus Fabric

AHB Arbiter

The AHB Arbiter arbitrates for the AHB bus among as many as four AHB master components.

Overview

The AHB Arbiter arbitrates for the AHB bus among as many as four AHB master components. The AHB Arbiter implements a round-robin arbitration algorithm to AHB Master components that are requesting use of the bus. Only one master component may control a given phase of the AHB transaction at a given time.

AHB is a pipelined bus in which there are three distinct phases: Arbitration Phase, Address (or Control) Phase, and Data Phase. A consequence of pipelining is that these phases overlap in time. For example, it is possible that Master component A wins the Arbitration Phase that is coincident with the Address Phase owned by Master component B and the Data Phase owned by Master component C. It is in these terms that an AHB system must be discussed.

The AHB Arbiter has four distinct Mirrored-Master component Ports, each of which can be connected to an AHB Master components (e.g. a processor or a DMA Controller), and one Port that connects to an AHB subsystem, typically through an AHB Channel module.

Key features

  • AMBA® 2.0 Compatible
  • Supports up to 4 AHB Master components
  • Round Robin Arbitration
  • Easily Expandable

Block Diagram

What’s Included?

  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model

Specifications

Identity

Part Number
AHB Arbiter
Vendor
Silvaco, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: United States

Learn more about Bus Fabric IP core

A Time Scaling Theory for Multi-Layer Electronic Systems

For six decades, Moore's geometric scaling drove progress in semiconductors. That industry compact no longer holds: returns from pure dimensional shrinking have flattened, leading-edge design budgets exceed one billion dollars per chip, and cost-per-transistor at the most advanced nodes is no longer falling.

CSoC Platform / Digital Subsystem IP for IoT

This paper describes a CSoC platform and configurable digital subsystem IP which can be deployed for development of IOT edge devices. The paper encompasses the different attributes of IOT edge device that can cater multiple industry segments, key features and benefits of CSoC platform, components of the digital subsystem IP that enables rapid prototyping of SoCs for IOT applications.

Secure Mobile Payments - Protecting display data in TrustZone-enabled SoCs with the Evatronix PANTA Family of Display Processors

Secure System-on-Chips (SoCs) based on ARM® TrustZone® technology enable both hardware and software components to be isolated as a secure subsystem within a complex SoC and as such focus on processing protected, sensitive and valuable assets, such as payment credentials, whenever these might be endangered with an attack, modification or capture. At the same time the main system software may be an open Rich OS platform that enables downloading and use of arbitrary third-party and non-trusted applications which can gain access to almost all system hardware elements.

Frequently asked questions about On-Chip Bus IP cores

What is AHB Arbiter?

AHB Arbiter is a Bus Fabric IP core from Silvaco, Inc. listed on Semi IP Hub.

How should engineers evaluate this Bus Fabric?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP