The WEASD18NI18RO21M22G is a baseband saturation detector that outputs a logic signal when the input voltage swing surpasses a pr…
- GlobalFoundries
- 22nm
- FDX
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
The WEASD18NI18RO21M22G is a baseband saturation detector that outputs a logic signal when the input voltage swing surpasses a pr…
Low Power 300-600 MHz programmable PLL
The WEAPLL400M22 is a low power integer PLL operating at a single 0.8 V power supply.
The WEAKA01PD22G is a power detector capable of detecting signals in the range of 3 dBm to 18 dBm with an accuracy of +/-0.5 dB.
Active Programmable High Pass Filter
The WEA228HPFA18BT122G is an active High Pass filter with variable frequency and variable gain.
The TS5111 and TS5110 device incorporate thermal sensing capability which is controlled and read over two wire bus.
Ultra-low-power 60 GHz radar-on-chip
Short-range radar has many potential applications, such as gesture control, contactless vital-signs monitoring, presence detectio…
12-bit 2GSPS Time Interleaved ADC
The WEAADC12BHSI22G is a 12-bit timeinterleaved Successive Approximation Analog-toDigital Converter (ADC) that supports both sing…
12-bit High Speed Analog to Digital Converter
The WEAADC12BHS22G is a 12-bit Successive Approximation Analog-to-Digital Converter (ADC) that supports both single-ended and dif…
ADPLL 2GHz Clock Generator - GLOBALFOUNDRIES 22FDX
All-digital phase locked loop (ADPLL) clock generator for a nominal frequency of 2 GHz (0.8 V).
Power-On Reset - Flexible Threshold (0.9–1.6V), Ultra Low Current (210nA) - Silterra 0.16 um
This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm C16G CMOS technology.
Linear Voltage Regulator - High Input Voltage (30V), Output Load up to 5mA
This macro-cell is a general purpose linear voltage regulator core designed for X-FAB 0.35μm XH035 CMOS technology.
Xtal Oscillator on TSMC CLN7FF
High end consumer and professional applications require crystals with a minimum number of external components.
Wide Range Programmable Integer PLL on UMC L65LL
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on UMC L130EHS
The wide range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplic…
Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN80GC
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN7FF
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN6FF
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN65LP
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN65GP
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…