Vendor: Chipus Microelectronics Category: Power On Reset (POR)

Power-On Reset - Flexible Threshold (0.9–1.6V), Ultra Low Current (210nA) - Silterra 0.16 um

This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm C16G CMOS technology.

Overview

This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm C16G CMOS technology.

The on threshold sensing voltage can be configured from 960mV to 1.62V (default are 1.1V @ 1.2V and 1.23V @ 1.8V). The off threshold sensing voltage can be configured from 880mV to 1.34V. A hysteresis of 39mV to 275mV is added to avoid false reset glitches in noisy supplies.

The core is easily retargeted to any other CMOS technology.

Key features

  • Supply voltage: 1.0–2.0V
  • Configurable assertion threshold: (920mV– 1.62V)
  • Hysteresis: (39mV– 275mV)
  • Lowcurrent consumption: (210nA @ 1.2V; 750nA @ 1.8V )
  • Indicative area: 0.0057mm2

Block Diagram

CM1419ffm block diagram

Applications

  • Passive/active RFID tag ICs
  • Battery powered equipment
  • Hearing aids

Specifications

Identity

Part Number
CM1419ffm
Vendor
Chipus Microelectronics
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Power On Reset (POR) IP core

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Frequently asked questions about Power-On Reset (POR) IP cores

What is Power-On Reset - Flexible Threshold (0.9–1.6V), Ultra Low Current (210nA) - Silterra 0.16 um?

Power-On Reset - Flexible Threshold (0.9–1.6V), Ultra Low Current (210nA) - Silterra 0.16 um is a Power On Reset (POR) IP core from Chipus Microelectronics listed on Semi IP Hub.

How should engineers evaluate this Power On Reset (POR)?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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