12 Bit 54 kS/s Cyclic ADC on XFAB XH018
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy.
- 12 Bit
ADC IP cores (Analog-to-Digital Converter IP) convert analog signals into digital data in modern SoC and ASIC designs, enabling interaction with real-world signals such as sensors, audio, and RF inputs.
These IP cores support various architectures including SAR ADC, pipeline ADC, and sigma-delta ADC, each optimized for different trade-offs between speed, resolution, and power consumption.
This catalog allows you to compare ADC IP cores from leading vendors based on resolution (bits), sampling rate, power efficiency, and process node compatibility.
Whether you are designing sensor interfaces, audio systems, industrial control applications, or RF front-ends, you can find the right ADC IP for your design.
12 Bit 54 kS/s Cyclic ADC on XFAB XH018
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy.
12 Bit 17 kS/s Cyclic ADC on XFAB XH018
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy.
16 Bit 13 kS/s Cyclic ADC on XFAB XH018
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy.
12b, 180MS/s, SAR ADC IP in 28nm
AD12BSAR180U28HPC is one slice of 12-bit analog-to-digital converter that operates up to 180MS/s.
The L55CSD16B16K IP consists of a 16-bit mono audio ADC with fully differential 1-channel mono audio input, 4-channel general pur…
Ultra-low power and high performance 12bit 1Msps SARADC
Supports 1Ksps~2Msps sampling rate; 8-channel differential inputs or 20-channel single-ended inputs; High performance: ENOB>=11.0…
Ultra-low power and high performance 12bit SARADC (2.7V~3.6V)
Supports 1Ksps~4Msps sampling rate; 4-channel differential inputs or 8-channel single-ended inputs; High performance: ENOB>=11.0b…
14-bit, 50 MSPS Ultra Low Power ADC in 28nm CMOS
The ODT-ADP-14B50M-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process with an optional input buf…
10-bit 1-channel 2.6 kSPS SAR ADC
IP 250iHP_ADC_09 is 10-bit 2.6 kSPS ADC employs high-performance single ended successive approximation architecture with embedded…
The nSAD_TS180_1V8_AD14b2M is a 14b 2MS/s, 13 ENOB, low-power SAR fully-differential AD converter designed on the TSMC 180 proces…
2-bit 1-channel 50 MHz flash ADC
The circuit is 2-bit ADC with programmable threshold.
12-bit 2-channel 5 to 7.5 MSPS cascade delta-sigma ADC
The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizer in both stages.
14-bit 8-channel 15 to 25 MSPS pipeline ADC
A block is a pipelined 8-channels ADC, built on a 12 1.5-bit multiplying DAC with sample data storage device and the final block …
AGAD12 is a 10bit 167MSPS Pipeline A/D converter.
9-bit 2-channel 0.5 to 33 MSPS (8 to 500 kHz BW) delta-sigma ADC
The block is second order delta-sigma ADC with 5-level quantizer.
12-bit 1-channel 15 to 25 MSPS pipeline ADC
250iHP_ADC_03 is a low-power high-speed 12-bit ADC that employs high-performance differential pipeline architecture.
12-bit 1-channel 10 to 100 MSPS pipeline ADC
250iHP_ADC_02 is a low-power high-speed 12-bit ADC that employs high-performance differential pipeline architecture.
12-bit 2-channel 2.2 MSPS (8.5 kHz BW) delta-sigma ADC
The cell is a second order delta-sigma dual channel (I/Q) analog-to-digital converter that supports sample rates up to 8.5 kHz an…
ADC 12-bit 80Mhz Dual channel - 3.3V
This dual channel Analog -to-Digital converter IP is based on a monolithic differential pipelined architecture with output error …
ADC 10-bit pipeline 110Mhz 3.3V
This Analog -to-Digital converter IP has a monolithic differential pipelined architecture with output error correction logic prov…