30-200 MHz DLL-based frequency multiplier
055TSMC_DLL_01 is a frequency multiplier that combines low phase jitter of clock signal, small area and low current consumption.
- TSMC
- 55nm
- GP
- Pre-Silicon
Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
30-200 MHz DLL-based frequency multiplier
055TSMC_DLL_01 is a frequency multiplier that combines low phase jitter of clock signal, small area and low current consumption.
Active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency
RFDBL04C is an active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency within the IC to…
16 to 64 MHz Phase-Locked Loop
130GF_PLL_01 is a ring VCO based phase-locked loop frequency with 16-64 MHz CMOS compatible output clock and fine frequency resol…
10 to 50 MHz crystal oscillator
180TSMC_OSC_04 is a reference frequency generator designed to form a reference signal in the frequency range from 10 to 50MHz.
Wide band 3.5 GHz -7 GHz low noise PLL synthesizer
055TSMC_PLL_02 is a PLL frequency synthesizer that generates a high-frequency signal in the range from 3.5GHz to 7GHz.
General Purpose PLL for VIS 150nm
The OT3122v150 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for …
50-800 MHz phase-locked loop frequency synthesizer
055TSMC_PLL_01 is an integer-N phase-locked loop frequency synthesizer (PLL), which produces stable clock signal in range from 50…
Time aligned Signal Generator core
The Signal Generator from NetTimeLogic is a clock aligned pulse and pattern (PWM) generator with nanosecond resolution (second an…
The Adjustable Clock from NetTimeLogic is an adjustable counter clock with nanosecond resolution (second and nanosecond format).
10 to 40 MHz crystal oscillator
180GF_OSC_01 is a crystal oscillator with Pierce architecture.
Ultra low power 32.768 kHz crystal oscillator
055UMC_OSC_01 is a crystal oscillator with Pierce architecture.
A 28nm 1.8V-3.3V Fail-Safe General-Purpose IO & OSC
This 28nm GPIO is designed for high-speed (>150MHz output, >250MHz input) applications.
Flexible 200kHz-20MHz Oscillator - Customizable frequency, Low Power - TSMC 40nm
This macro-cell is a flexible general purpose oscillator core designed for TSMC 40nm CRN40LP CMOS technology.
General Purpose PLL for TSMC 152nm
The OT3130 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for the …
10 to 200 MHz DLL-based frequency multiplier
DLL-based frequency multiplier is a simple to configure and operate block, combining, small area and low current consumption.
Programmable 5-bit CMOS low-frequency divider
The programmable CMOS low-frequency divider configuration of asynchronous programmable impulse counter, control logic and output …
Programmable CMOS PLL high-frequency divider
The divider consists of the input signal preamplifier (buffer), the converter of a differential input signal to an unipolar signa…
Ideal for use as watch-dog timers and core clock generators for MCUs and low-power chips with competitive features.
IP is a low power high resolution RC oscillator nominally operates at 100 MHz output clock from a 1.2 V supply.
IP is a low power high resolution RC oscillator nominally operates at 10 MHz output clock from a 1.2 V supply.