Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
VeriSilicon SMIC 0.13um 1.2V/2.5V OSC
Optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13μm Logic Salicide 1.2/2.5V process, S13V25_OSCIO_0…
The Clocking Wizard is provided under the terms of the Xilinx End User License and is included with ISE and Vivado software at no…
Low noise PLL operating at up to 3.25GHz (90nm UMC)
PSI3GRP_U9 is a low jitter PLL operating from 1GHz to 3.25GHz.
Wide range PLL operating from 135MHz to 945MHz (90nm UMC)
PSIWRP_U9 is a wide range PLL with the VCO operating from 175MHz to 945MHz.
Low spurs PLL operating at 1.296GHz (90nm UMC)
PSI1GLSP_U9 is a low spurs PLL operating at 1.296GHz.
Low noise PLL operating at 1.25GHz and 625MHz (90nm UMC)
PSI1GLP_U9 is a low jitter PLL operating at 1.
Low noise PLL operating at up to 5GHz (40nm TSMC)
PSI5GLP_T4 is a low jitter PLL operating from 3GHz to 5GHz continuously, and with the output divider it can cover 1/2 and 1/4 spe…
Low noise PLL operating at up to 3.25GHz (40nm TSMC)
PSI3GLP_T4 is a low jitter PLL operating from 2GHz to 3.3GHz continuously, and with the output divider it can cover 1/2 and 1/4 s…
IBM 65nm LPe 24M Crystal Oscillator
This is a crystal oscillator specifically designed for low power application.
Designed for audio clock generation, this PLL integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control …
SMIC 65nm 1.2v/2.5v Spread Spectrum PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
Numerically Controlled Oscillator
Numerically Controlled Oscillators (NCO), also called Direct Digital Synthesizers (DDS), offer several advantages over other type…
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
SMIC 65nm 2.5/1.2V 32768Hz Crystal Oscillator
This is a 32768Hz crystal oscillator specifically designed for ultra-low power application.
This IP is a programmable Analog PLL suitable for high speed clock generation.
SMIC 0.18um 1.8v Ring Oscillator
The present IP is a Ring Oscillator.
Designed for audio clock generation, this PLL integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control …
This PLL is designed for audio clock generation.
The S13V33_DLL_04 generates 4-channel fixed timing delay.