8b/10b Encoder/Decoder

The CODEC_8B10B IP Core is a scalable 8B/10B Encoder/Decoder pair suitable for a wide range of serial data transmission applications. The design is optimized for very high-speed operation and is suitable for use in serial data links of 6 GHz+ on basic FPGA devices.

The design is comprised of an independent encoder and decoder module that may be used separately or together as a combined CODEC unit. The architecture is fully scalable allowing any number of bytes or words to be encoded or decoded in parallel. The number of bytes and words are specified by the nb and nw generic parameters.

The encoder and decoder feature a simple synchronous user interface. Data inputs and flags are sampled on the rising-edge of clk when the datain_val signal is active high. Likewise, data outputs and flags are valid on the rising-edge of clk when dataout_val is active high.

As well as regular 8-bit data, the encoder can accept one of the special control characters or symbols. These symbols are labelled K.28.0 to K.30.7 and, by convention, are used to insert 'commas' and control characters in a transmitted bitstream.

• Technology independent soft IP Core for FPGA, ASIC and SoC devices
• Supplied as human readable VHDL (or Verilog) source code
• Separate Encoder/Decoder pair that implements the standard IBM® 8b/10b line code for a DC-balanced serial data stream
• Fully synchronous design with data input and output valid flags
• Encoder and Decoder have a latency of 1 clock cycle
• Generic parallel input and output data widths (specified in whole numbers of input and output bytes)
• Supports all standard control bytes - K.28.0 to K.30.7
• Error flags indicate control byte errors and general decoding errors
• Running Disparity (RD) calculations handled internally and encoder also provides current RD as an output for downstream devices
• Fully scalable, generic architecture
• Suitable for use in serial data links of 6 GHz+ on basic FPGA devices

• High speed serial interfaces with embedded clocking
• Transmission of DC-balanced, AC-coupled serial data
• Prerequisite for the transmission of serial data over large distances
• Ideal for use in generic serial links (e.g. LVDS or any differential electrical standard)
• Encoding scheme used in a wide range of communication systems such as Ethernet, PCI Express, DVB-ASI, Digital Audio, Fibre Channel, etc.