Vendor: Certus Semiconductor Category: ESD Protection

5V ESD Clamp in GlobalFoundries 180nm LPe

A GlobalFoundries 180nm LPe Specialized 5V ESD Clamp.

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GlobalFoundries 180nm View all specifications

Overview

A GlobalFoundries 180nm LPe Specialized 5V ESD Clamp.

A key attribute of this 5V Clamp is that it can be used for either signal protection or 1.8V power supplies. The clamp is a single cell, 44um x 32um in size. It is built from the substrate to metal 6. The clamp is very dense in metal, and diffusion, a wide area around the clamp (3um to 10um) should have minimum metals between layers 1 and 3, as well as little diffusion, to pass directly to chip top.

 Cell Names and Variation

Cell Name Description
ESD50_ggnmos Standard 5V Clamp


 Pin Out and Function

Parameter Description
PAD50 Signal/Power
VSS Ground
SUB SOI-Substrate


 Electrical Specifications

Parameter Description Min Typical Max Unit
Vm ax Max Voltage at PAD 50 -0.5 5 5.6 Volts
Il eak Leakage Current N/A 1.5 15 nA
Cm ax Load Capacitance N/A N/A 0.5 pF


 Metallization

  • PAD50 (Metal 4): Primary ESD current path. Robust connection, in wide thick metals and losts of vias, compliant with ESD.
  • VSS (Metal 4): Primary ESD current path. Robust connection, in wide thick metals and losts of vias, compliant with ESD
  • SUB (schematic only): There is no layout connection for SUB. This is the SUB connection inherent to whatever layout top level the clamp is placed into. The CDL netlit, however, has pin for it, and must connect to the SUB net of the top-level block the layout is placed in GROUND reference for ESD.

Block Diagram

5V ESD Clamp in GlobalFoundries 180nm LPe block diagram

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 180nm 180 1800 nm —

Specifications

Identity

Part Number
5V ESD Clamp in GlobalFoundries 180nm LPe
Vendor
Certus Semiconductor
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Certus Semiconductor
HQ: United States
Contact Certus Semiconductor

Learn more about ESD Protection IP core

One Platform, Five Libraries: Certus Semiconductor’s I/O IP Portfolio for Every Application on TSMC 22nm ULL/ULP Technologies

Certus Semiconductor’s I/O libraries for TSMC’s 22nm ultra-low leakage (22ULL) and 22nm ultra-low power (22ULP) technologies offer robust, high-performance solutions tailored to a wide range of SoC designs — from ultra-low power IoT nodes to demanding consumer and automotive systems. Whether you need low leakage, high drive strength, or analog compatibility, our production-proven IP covers it all.

Frequently asked questions about ESD Protection Library IP cores

What is 5V ESD Clamp in GlobalFoundries 180nm LPe?

5V ESD Clamp in GlobalFoundries 180nm LPe is a ESD Protection IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for globalfoundries.

How should engineers evaluate this ESD Protection?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ESD Protection IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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