Vendor: Dolphin Semiconductor Category: PLL

24-bit PDM to PCM 117 dB SNR with ASRC & PLL-less 6 channels

The hexDSA-YA2.01is a PDM-to-PCM converter to interface with digital microphones.

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Overview

The hexDSA-YA2.01is a PDM-to-PCM converter to interface with digital microphones. This product optionally includes a unique VAD feature and an Automatic Gain Control (AGC) for ensuring the best quality of the recording sound whatever the end-user environment.
It features ASRC and two different audio streams to ensure multi-source compatibility and high-performance smartspeaker applications.

Key features

  • PDM to PCM converter with 6 input channels
  • WhisperTrigger - low power Voice Activity Detector
  • I2C and APB control interface
  • Direct connection to digital microphones
  • Automatic Gain Control (AGC)
  • Compatible with standard clock available in your system.
  • High dynamic range for high-quality recording in far-field applications

Block Diagram

hexDSA-YA2.01 block diagram

Specifications

Identity

Part Number
hexDSA-YA2.01
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Dolphin Semiconductor

Learn more about PLL IP core

Breaking new energy efficiency records with advanced power management platform

The free lunch offered for decades by Moore’s law is now over and scaling down to the next technology node no longer offers the required energy efficiency gains. Design teams must now pursue their gains by deploying increasingly complex power management techniques to meet the demands of the new IoT markets.

Improving Battery-Powered Device Operation Time Thanks To Power Efficient Sleep Mode

Allowing battery-powered devices to run, without battery recharge, for years rather than months, partakes in enhancing significantly end-user satisfaction and is a key point to enabling the emergence of IoT applications. Numerous applications, such as M2M, BLE, Zigbee…, have an activity rate (duty cycle) such that the power consumption in sleep mode dominates the overall current drawn by the SoC (System on Chip). For such applications, the design of the “Always-On power domain" (a.k.a AON power domain) is pivotal.

Application Hardware Modeling: Selective modeling for early prediction of subsystem performances through simulation

The virtual validation of subsystem performances (Pop-up Noise, Signal-to-Noise Ratio, Power supply Noise, Power consumption...) requires the modeling and simulation of complete subsystems. Application Hardware Modeling (AHM) consists in addressing the risks of performance degradation while integrating a Silicon IP in its Integrated Circuit (IC) and this IC on its Printed Circuit Board (PCB). The selection of relevant models for a subsystem performance, along with the creation and validation of models through equivalence checking, are the basics of Application Hardware Modeling for right-on-first-pass subsystems!

Creating a Frequency Plan for a System using a PLL

How do you ensure that every part of a system receives the clock it needs—without wasting power or sacrificing performance? The answer lies in creating a well-structured frequency plan built around a PLL.

Frequently asked questions about PLL IP cores

What is 24-bit PDM to PCM 117 dB SNR with ASRC & PLL-less 6 channels?

24-bit PDM to PCM 117 dB SNR with ASRC & PLL-less 6 channels is a PLL IP core from Dolphin Semiconductor listed on Semi IP Hub.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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