The A10B500M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block.
The A10B500M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a successive approximation register (SAR) ADC, with 10-bit resolution and a sampling rate of 500 megasamples per second (MSPS).
The A10B500M delivers performance that is unrivaled in the ultra-low power ADC market, with a power consumption of only 1.2 mW, and input bandwidth of 3 GHz.
The cost-effective IP block has been designed and verified for FDSOI processes and validated at 28 nm FDSOI process.
The ADC IP is also available in a radiation-tolerant version, that can function under harsh environmental constraints.
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10-bit, 500 MSPS SAR ADC - STMicroelectronics 28nm is a ADC IP core from Alphacore, Inc. listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.