The ODT-ADS-12B5G-T28 is an ultra-highperformance time-interleaved ADC designed in a 28nm CMOS process.
The ODT-ADS-12B5G-T28 is an ultra-highperformance time-interleaved ADC designed in a 28nm CMOS process.
This 12-bit, 5GSPS ADC supports input signals up to Nyquist and features a differential fullscale range of 0.8Vpp and excellent static and dynamic performance.
The ADC architecture is optimized to maximize performance while minimizing power and area consumption. The ADC input is internally buffered and then distributed to timeinterleaved ADC channels.
The ADC includes built in calibration to remove time interleaving artifacts, including offset mismatch, gain mismatch and timing skew.
To maximize SNR, the ADC includes an ultralow-jitter clock distribution network with aperture jitter of 50fsrms.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 28nm | 28nm 280 nm | — |
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Ultra high-performance low-power ADC is a ADC IP core from Omni Design Technologies, Inc. listed on Semi IP Hub. It is listed with support for tsmc.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
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