32-bit Floating-point Square-root IP Core
High-speed fully pipelined 32-bit floating-point square-root function based on the IEEE 754 standard.
- Arithmetic Units
32-bit Floating-point Square-root IP Core
High-speed fully pipelined 32-bit floating-point square-root function based on the IEEE 754 standard.
Digital video up/down scaler permits independent horizontal and vertical scaling to generate any desired resolution or aspect rat…
XY2_SCALER is a very high quality video scaler capable of generating interpolated output images from 16x16 up to 216 x 216 pixels…
The TXT_OVERLAY IP Core is a versatile On Screen Display (OSD) module that allows text and bitmap graphics to be inserted over RG…
VID_OVERLAY is a versatile video multiplexer that allows one video stream to be inserted over another.
Digital Video Anti-aliasing filter IP Core
The ALIAS_FILTER IP Core is a fully pipelined anti-aliasing filter for use in digital video applications.
High-precision 16-bit complex digital up-converter / IQ modulator (DUC) with a fully configurable interpolation filter stage.
The VID_SCALER_4K IP Core is a studio quality video scaler capable of generating scaled output images up to 216 x 216 pixels in r…
The MAN_CODEC IP Core is a versatile encoder and decoder pair that converts a basic NRZ bitstream into a standard Manchester code…
The Camera Link® IP Core is a high-speed LVDS transmitter / receiver pair that conforms to the standard Camera Link protocol orig…
Graphics Processor Overlay IP Core
The GPU_OVERLAY IP Core is a versatile on-screen display processor that allows high-quality anti-aliased bitmap graphics and text…
SMPTE Decoder with Colour-Space Converter
The HD_SMPTE_DECODER IP Core is a digital video decoder with integrated colour-space converter.
The INTERLACER IP Core is a fully pipelined video interlacer solution that converts any progressive video format into its interla…
ATAN_X calculates the inverse tangent of a fraction.
Packet-based Digital Radio Link
Fully custom Digital Radio Link based on either our FSK, PSK or Manchester modulation schemes.
SINCOS_X calculates the sine and cosine of an angle in radians.
ATAN2_XY calculates the 4-quadrant inverse tangent in the range -π to π.
PIPE_SQRT is a pipelined square-root with configurable data width.
PIPE_DIV is a pipelined divider with configurable data width.
Pipelined Multiplier with generic width and depth
PIPE_MULT is a general purpose multiplier with a configurable data width and configurable number of pipeline stages.