MSquare
•
HQ:
China
The Die-to-Die interface is a functional block that provides a data interface between two chip dies within the same package.
- UCIe
Compare 10 MSquare IP Cores from 1 vendors
-
-
MSquare• HQ: China
MSquare's eDP PHY is a reliable solution for display interface requirements, supporting resolutions of 4K and higher.
- Single-Protocol PHY
-
MSquare• HQ: China
MSquare's ONFI 5.1 PHY is a high-performance and low-power PHY IP, which supports all modes of the Open NAND Flash Interface (ONF…
- Single-Protocol PHY
-
MSquare• HQ: China
MSquare's LPDDR5X/4X PHY is a transceiver physical layer IP interface solution designed for ASICs and SOCs.
- Single-Protocol PHY
-
MSquare• HQ: China
MSquare's LPDDR4X PHY is a transceiver physical layer IP interface solution designed for ASICs and SOCs.
- Single-Protocol PHY
-
MSquare• HQ: China
The Die-to-Die interface is a functional block that provides a data interface between two chip dies in the same package.
- UCIe
-
MSquare• HQ: China
MSquare offers a silicon-proven ONFI 5.0 PHY IP that supports all modes of the Open NAND Flash Interface (ONFI) 5.0 specification.
- Single-Protocol PHY
-
MSquare• HQ: China
MSquare's HBM3 IP (the 3rd generation of High-Bandwidth Memory) is specifically tailored for applications that require high memor…
- HBM
-
USB 3.2 Gen2x2 with PIPE 4.3 and USB2.0 with UTMI+ interface
MSquare• HQ: ChinaMSquare's USB 3.2 PHY IP is designed based on the USB 3.2 Gen2x1 and USB 2.0 specifications from the USB Implementers Forum and d…
- USB
-
MSquare• HQ: China
MSquare's PCI Express 4.0 PHY IP includes a high-speed, -efficient, and cost-effective transceiver to turbocharge today's high-pe…
- Single-Protocol PHY