The Consumer Electronics Control (HDMI-CEC) is a bi-directional serial bus designed to control multiple HDMI devices with a singl…
- HDMI
Multimedia Interface IP cores provide the high-speed connectivity technologies required to transport video, audio, image, and display data across modern SoCs, ASICs, and electronic systems. These interfaces are essential for enabling seamless communication between processors, cameras, displays, sensors, and multimedia subsystems.
This category includes HDMI, DisplayPort, MIPI, V-By-One, and VESA DSC (Display Stream Compression) IP solutions. Available implementations may include controllers, PHYs, protocol stacks, bridge solutions, and complete subsystem IP supporting high-resolution displays, camera interfaces, video transport, display compression, and multimedia data exchange.
Compare multimedia interface IP cores by protocol standard, feature set, implementation model, and vendor offering to support your video, display, and media connectivity roadmap.
The Consumer Electronics Control (HDMI-CEC) is a bi-directional serial bus designed to control multiple HDMI devices with a singl…
eDP Transmitter core is compliant with standard eDP 1.4b specification.
eDP Receiver core is compliant with standard eDP 1.4b specification.
DSC ENCODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a.
DSC DECODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a.
Display Port Transmitter core is compliant with Display Port version 2.0 specification.
Display Port Receiver core is compliant with Display Port version 2.0 specification.
MIPI CSI-2 Transmitter interface provides full support for the two-wire MIPI CSI2 serial interface, compatible with MIPI CSI-2 Sp…
MIPI CSI-2 Receiver interface provides full support for the two-wire MIPI CSI2 serial interface, compatible with MIPI CSI-2 Speci…
MIPI BIF Slave interface provides full support for the two-wire MIPI BIF synchronous serial interface, compatible with MIPI BIF 1…
MIPI BIF Master interface provides full support for the two-wire MIPI BIF synchronous serial interface, compatible with BIF 1.0 s…
MIPI ASPMI Slave interface provides full support for the two-wire MIPI ASPMI synchronous serial interface, compatible with SPMI s…
The DisplayPort Verification IP provides an effective & efficient way to verify the components interfacing with the DisplayPort i…
The HDMI Verification IP provides an effective & efficient way to verify the components interfacing with HDMI interface of an ASI…
The eDP 1.5 Verification IP provides an effective & efficient way to verify the components interfacing with the eDP interface of …
DisplayPort 2.1 Verification IP
The DisplayPort Verification IP provides an effective & efficient way to verify the DP components of an IP or SoC.
eDisplayPort v1.4 Transmitter Controller IP Core
This eDisplayPort 1.4 Tx Controller IP Core integrates into any SoC or FPGA development, supporting the eDisplayPort 1.4b specifi…
eDisplayPort v1.4 Receiver Controller IP Core
This eDisplayPort 1.4 Rx Controller IP Core is a versatile and comprehensive solution designed for easy integration into any SoC …
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI
The logic required to create and validate designs for diverse applications is provided by HDMI Transmitter (TX) IP solutions, whi…
V-by-One/LVDS Rx IP, Silicon Proven in SMIC 40LL
V-by-One® HS technology targets a high-speed data transmission of video signals based on internal connection of equipment.