Video Processing IP cores provide hardware-accelerated video encoding, decoding, transcoding, compression, decompression, scaling, and stream processing capabilities for modern SoC and ASIC designs.
This category includes IP solutions supporting major video and image compression standards such as AV1, AV2, H.264/AVC, H.265/HEVC, H.266/VVC, VP8, VP9, MPEG-2, MPEG-4, MPEG-5 LCEVC, JPEG, and JPEG 2000. These IP cores enable efficient video delivery, storage, streaming, analytics, and multimedia processing across a wide range of semiconductor applications.
This catalog allows semiconductor engineers to evaluate and compare Video Processing IP from leading vendors based on codec support, encoding and decoding performance, video quality, resolution capability, throughput, latency, silicon area, power efficiency, and process node compatibility.
JPEG Codec Full HD(YUV422) 48fps@100MHz. (2Sample/clk)
The KJN-4 conform to the JPEG baseline format for compressing/decompressing still images.
JPEG Encoder Full HD(YUV422) 24fps@100MHz. (1Sample/clk)
The KJN-1ENC conform to the JPEG baseline format for compressing still images.
JPEG Codec Full HD(YUV422) 24fps@100MHz.(1sample/clk)
The KJN-1+ conform to the JPEG baseline format for compressing/decompressing still images.
IP
Lossless JPEG Codec Full HD(YUV422) 24fps@100MHz. (1Sample/clk)
KJN-1LSC conform to the Lossless JPEG format(ITU-T T.81 Annex H) and compress/decompress image data without data loss in comparis…
Highly effective and small gate size Mosquito Noise Reducer
JVC KENWOOD's Mosquito Noise Reducer IP, which is already used in its products, is now available for licensing.
JPEG Codec 4K(YUV422) 96fps@200MHz,
The KJN-7EX conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still im…
JVC Object-Based Gloss Enhancer
JVC's Object-Based Gloss Enhancer IP, which is already used in its products, is now available for licensing.
The TXT_OVERLAY IP Core is a versatile On Screen Display (OSD) module that allows text and bitmap graphics to be inserted over RG…
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm.
HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264LD core is a hardware implementation of the H.264 baseline video compression algorithm.
Real-time Pixel Processor for Vision applications
Dream Chip’s Real-time Pixel Processor for Vision applications is a scalable and configurable Standard Dynamic Range (SDR) capabl…
VID_OVERLAY is a versatile video multiplexer that allows one video stream to be inserted over another.
Digital Video Anti-aliasing filter IP Core
The ALIAS_FILTER IP Core is a fully pipelined anti-aliasing filter for use in digital video applications.
High-Perfomance, multi-format Video Encoder IP
The E300 Series of Encoder IP features a new hardware architecture that minimizes the silicon area while enabling 4K resolution e…
The CMS-1 is a parameterized integration of the VSC-1 scaler core with other IP as needed for ABR and similar applications requir…
The VID_SCALER_4K IP Core is a studio quality video scaler capable of generating scaled output images up to 216 x 216 pixels in r…
This “Dual-Core” High-Speed Baseline JPEG Encoder (Compression) core is capable of encoding video on-the-fly while producing stan…
Video Quality Metric Accelerator IP
Purpose-built silicon IP to accelerate compute-intensive video quality measurement such as VMAF
H.264 Audio & Video Decoder IP
The H.264 Decoder IP Core is a full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA de…