Vendor: Allegro DVT Category: Video Processing

High-Perfomance, multi-format Video Encoder IP

The E300 Series of Encoder IP features a new hardware architecture that minimizes the silicon area while enabling 4K resolution e…

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Overview

The E300 Series of Encoder IP features a new hardware architecture that minimizes the silicon area while enabling 4K resolution encoding in a single core and beyond in a multi-core configuration. The E300 Series Encoder is built around a true multi format architecture that shares resources between the H.264, H.265, VP9, AV1, JPEG, VVC compression standards, while providing superior video encoding quality. The E300 Series Encoder IP also has multiple new smart encoding features allowing customers to considerably reduce the bitrate to meet their application specific requirements.

Supported formats

  • AV1 Main, High and Professional Profile
  • VP9 Profile 0, Profile 2
  • H.265 Main, Main 10 and Main 12 profiles
  • H.264 Constrained Baseline, Main, Progressive Hight, Pogressive High 10, High, High Predictive, High Intra, CAVLC Intra
  • JPEG Baseline Lossless
  • VVC Main Profile

Interfaces

  • AMBA APB interface for control registers programming
  • AMBA AXI interfaces for data access

Key features

  • Ultra low latency coding
  • Source input compression
  • Dynamic changes of the encoding parameters
  • Advanced coding tools (LookAhead,…)
  • Smart encoding tools (ROI,…)
  • Video surveillance features
  • Color space conversion
  • Bit depth conversion
  • Chroma format conversion

What’s Included?

  • RTL source code
  • C control software
  • Bit accurate executable software reference model
  • Documentation

Specifications

Identity

Part Number
E300 Series
Vendor
Allegro DVT
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Allegro DVT
HQ: France
Contact Allegro DVT

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is High-Perfomance, multi-format Video Encoder IP?

High-Perfomance, multi-format Video Encoder IP is a Video Processing IP core from Allegro DVT listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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