HBM3 PHY (Hard 1) in TSMC (N5)
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM2E PHY V2 in TSMC (N7, N6, N5)
The HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking…
HBM2E PHY V2 (Hard 1) in TSMC (N7, N6, N5)
The Synopsys HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and n…
DDR5/4 PHY in TSMC (16nm, 12nm, N6, N7, N5)
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
LPDDR4x/5 Secondary/Slave (memory side!) PHY
This LPDDR4/4X/5 PHY is a memory-side interface IP normally found implemented within commodity DRAM products.
112G LR-Max Ethernet PHY for TSMC N5
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networki…
224G Ethernet PHY for TSMC 3nm
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth…
12bit, 640Msps Dual channel IQ ADC IP Core
Dual channel 12-bit, 640MS/s ADC is essentially a Dual channel 12-bit analog-to-digital converter (ADC) that can function at spee…
Low-power, high-speed 11-bit, 8 GSPS SAR ADC - TSMC 28nm HPC+
The A11B8G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
11-bit SAR ADC - TSMC 28nm HPC+
The A11B4G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
The 56G Long-Reach (LR) SerDes PHY provides exceptional performance with best-in-class power and area, making it ideal for machine learning (ML) and 5G infrastructure application
14-bit 400 MSPS SAR ADC - TSMC 28nmHPC+
The A14B400M-TS28H is an ultra low-power, high-performance SAR analog to digital converter (ADC) intellectual property (IP) desig…
The A14B200M-TS28H is an ultra low-power, high-performance SAR analog to digital converter (ADC) intellectual property (IP) desig…
12-bit, 400 MSPS DAC - TSMC 28HPC+
The D12B400M-TS28H is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block.
14-bit, 200 MSPS DAC - TSMC 28 HPC+
The D14B200M-TS28H is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block.
16G Multiproocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base …
PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 40LP
PCIe Gen 3.1 transmission is supported by (PCIe 3.1) x4 PHY IP.
PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
(PCIe 3.1) x4 PHY IP supports PCIe3.1 transmission.