112G

The Pulse

• Analog Foundation Models
• GlobalFoundries Appoints Matthew Zack as Chief Corporate Development Officer
• VeriSilicon’s NPU IP VIP9000NanoOi-FS has achieved ISO 26262 ASIL B certification
• NVIDIA and Synopsys Announce Strategic Partnership to Revolutionize Engineering and Design
• Modeling and Optimizing Performance Bottlenecks for Neuromorphic Accelerators
• CAVP-Validated Post-Quantum Cryptography
• RISC-V Based TinyML Accelerator for Depthwise Separable Convolutions in Edge AI
• Presto Engineering Group Acquires Garfield Microelectronics Ltd, Creating Europe’s Most Comprehensive ASIC Design to Production One-Stop-Shop
• Exclude Smart in Functional Coverage
• A 0.32 mm² 100 Mb/s 223 mW ASIC in 22FDX for Joint Jammer Mitigation, Channel Estimation, and SIMO Data Detection
• The role of AI processor architecture in power consumption efficiency
• Evaluating the Side Channel Security of Post-Quantum Hardware IP
• A Golden Source As The Single Source Of Truth In HSI
• ONFI 5.2: What’s new in Open NAND Flash Interface's latest 5.2 standard
• Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025