UCIe™ Chiplet IP on TSMC 3DFabric® Platform
By Archana Cheruliyil, Principal Product Marketing Manager, Alphawave Semi
Alphawave Semi has announced the successful tape-out of its cutting edge UCIe™ 3D IP on the advanced TSMC SoIC® (SoIC-X) technology in the 3DFabric platform.
This achievement builds on Alphawave Semi’s established baseline of leading UCIe™ IP subsystems and presents a significant evolution in the company’s chiplet integration capabilities. By leveraging TSMC’s SoIC-X advanced 3D packaging technology, Alphawave Semi continues to push the boundaries of power, performance efficiency and bandwidth for next generation datacenter, AI, and HPC applications.
The IP supports face-to-face (F2F) configurations and provides a 10x improvement in power efficiency over traditional 2.5D die-to-die interfaces. It also delivers up to a 5x increased signal density.
Related Semiconductor IP
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- UCIe 3.0 Verification IP
- Verification IP for UCIe
- UCIe Verification IP
- AXI to UCIe Bridge IP
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