Scaling AI Chip Design With NoC Soft Tiling
Tiling is about repeating modular units within the same chip to enhance scalability and efficiency; chiplets involve combining different silicon...
Trending topic
NoC Semiconductor IP News & Insights
Follow the latest news, technical articles, expert perspectives and ecosystem updates related to NoC and semiconductor IP design.
Latest updates
279 results about NoC
Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
A new trend is emerging in the design of high-end, multi-billion-transistor system-on-chip (SoC) devices. Referred to as “NoC tiling,” this evolutionary...
Tenstorrent Expands Deployment of Arteris’ Network-on-Chip IP to Next-Generation of Chiplet-Based AI Solutions
Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced Tenstorrent has licensed...
Arteris Network-on-Chip Tiling Innovation Accelerates Semiconductor Designs for AI Applications
Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced an innovative evolution...
SignatureIP Networks-on-Chips (NoCs) to Accelerate RISC-V Designs
SignatureIP, the pioneer of next generation interconnect and interface solutions, announces that its Networks-on-Chips (NoCs) provide the necessary...
NoCs and the transition to multi-die systems using chiplets
Monolithic dies have long been used in integrated circuit (IC) design, offering a compact and efficient solution for building application-specific...
SignatureIP Makes Network-on-Chip (NoC) Design Widely Accessible with Cloud-Based iNoCulator™ Platform
Available at iNoCulator.ai, it is the first cloud-based platform for design of a Network on Chip (NoC). A NoC provides the interconnect infrastructure...
Why verification matters in network-on-chip (NoC) design
In this article, we will dive deeper into a comprehensive methodology for formally verifying an NoC, showcasing the approaches and techniques that...
Navigating Integration Challenges for the RISC-V Ecosystem with Networks-on-Chips (NoCs)
Frank Schirrmeister, Arteris
SignatureIP's iNoCulator Tool - a Simple-to-use tool for Complex SoCs
A Network-on-chip (NoC) is a network inside a System-on-chip (SoC) that connects to all IO, Compute and Storage devices. In addition to its networking...
SignatureIP launches its new iNoCulator NoC configuration tool with a free trial offer
SignatureIP, the pioneer of next generation NoC tools, has launched its new iNoCulator™ NoC configuration tool with a free trial period of two weeks...
SoC design: When a network-on-chip meets cache coherency
Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially...
About NoC in semiconductor IP
This topic page collects recent semiconductor IP updates, technical articles, expert perspectives and industry news related to NoC.
Use it to track relevant IP trends, ecosystem announcements, design technologies, standards, architectures and related IP categories inside Semi IP Hub.