Deliver "Smarter" Faster: Design Methodology for AI/ML Processor Design
By Joe Sawicki, executive vice president of IC EDA division, Mentor
EETimes (June 19, 2019)
New design tools can develop circuits for AI and machine learning faster than ever. AI/ML is being used to make those same design tools even faster.
We are at the beginning of an age where artificial intelligence (AI) processing will advance in sophistication rapidly and become ubiquitous. While the concept of AI — giving machines the ability to mimic cognitive functions to learn and solve problems and then take an action — has been an academic discipline since the mid-1950s, it wasn’t until the last five years that AI processing, mostly in the form of machine learning (ML), could step out of the dimly-lit halls of research and supercomputer one-offs and move to practical everyday use. Why?
The amount of data generated from the internet and billions of smart devices alone has given us more than enough data to collect sizable data sets with which we can have ML filter and train ML-based systems to use. In addition, today we have enough ubiquitous high-performance compute power in smart devices and the high-bandwidth communications infrastructure to process and transfer massive data sets quickly. This compute power also gives us the canvas to develop ever more sophisticated and specialized algorithms for particular tasks, further expanding the application of AI/ML.
To read the full article, click here
Related Semiconductor IP
- Verification IP for MIPI SoundWire
- 100M/1G/ TSN Endpoint DO-254 IP Core
- Image Signal Processor
- H.265 / HEVC Video Codec
- H.264 / AVC Video Encoder
Related Articles
- The role of cache in AI processor design
- Soft Tiling RISC-V Processor Clusters Speed Design and Reduce Risk
- QiMeng: Fully Automated Hardware and Software Design for Processor Chip
- Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes
Latest Articles
- Minimum RISC-V: Maximum FPGA Efficiency
- The Era of Vibe Tapeout: Dark Age or Golden Age for Analog Circuit Design?
- Understanding the Power Consumption of Modern High Bandwidth Memory: Experimental Analysis and Modeling Using Real HBM2 DRAM Chips
- BARE-AI: Bit-Flip Attack Resilience in AI Hardware through Built-in Performance Monitors
- RFChipAgent: Multi-Agentic AI Flow for Analog/RF Chip Design