Is FPGA power design ready for concurrent engineering?
September 25, 2014
Semiconductor IP Articles Archive - Page 60 of 228
Product how-to: Reliable SoC bus architecture improves performance
September 24, 2014
Design trade-offs for product development
September 23, 2014
RISC-VLIW IP Core for the Airborn Navigation Functional Oriented Processor
September 22, 2014
Addressing MIPI M-PHY connectivity challenges for more efficient testing
September 22, 2014
Low-loss compression of CPRI baseband data
September 19, 2014
Reducing Power Consumption while increasing SoC Performance
September 15, 2014
Capturing a UART Design in MyHDL & Testing It in an FPGA
September 11, 2014
What is 802.11ac, anyway?
September 11, 2014
Testing for Security: Key to Automotive Development
September 8, 2014
An innovative methodology to reduce routing capacitance of ADC channels
September 8, 2014
Semiconductor innovations in computer vision and mobile photography
September 4, 2014
Low Power Universal Gates for Approximate Computing
September 1, 2014
A Realtime 1080P30 H.264 Encoder System on a Zynq Device
September 1, 2014
Bug hunting SoC designs to achieve full functional coverage closure
September 1, 2014
BIST schemes for ADCs
August 29, 2014
Embedded flash process enhances performance: Product how-to
August 28, 2014
Pinning down the acceptable level of jitter for your embedded design
August 28, 2014
Challenges and Benefits of Low Power Design Verification with CPF for a standalone IP
August 25, 2014
Using multi-bit flip-flop custom cells to achieve better SoC design efficiency
August 21, 2014