Wipro methodology monitors IC design cycle

Wipro methodology monitors IC design cycle
By K.C. Krishnadas, EE Times
December 5, 2001 (3:27 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011205S0082

BANGALORE, India — Wipro Technologies says it has developed a hardware design methodology that automates monitoring and error detection throughout the design cycle, and can thus reduce design cycle time as much as 40 percent. The methodology, dubbed EagleWision, results from a decade of product design work at Wipro and will be announced at an upcoming design conference.

Using in-house tools, the methodology employs rule-checking at each stage in the design cycle. In the case of IC designs, rule checking extends from the logic code level to the silicon-manufacturing stage.

"Every aspect of the design phase is scrutinized to weed out the occurrence of defects," said A. Vasudevan, head of Wipro's VLSI/System Design Group. "Each output of a phase is verified against the corresponding RuleBook [a set of guidelines that document the EagleWision methodology] and any noncompliance [is] flagged. Thus, defects are primarily avoided, and the ones th at do occur are detected very early in the design."

Automated verification of defect correction makes it possible "to fix defects quickly and take the design through the rest of the steps," Vasudevan said.

The methodology can be used to design ICs as well as boards, he said.

Reusable elements, such as the automation capabilities and reporting features, are being used to verify the automotive system-on-chip design of an unidentified European company, Vasudevan said.

"Time-to-market is becoming even more vital in successful product launches," said Wipro manager Rajita Kaundin. "Product companies themselves decide to outsource for reasons ranging from the lack of enough trained engineers to ASIC companies' not wanting to invest in expensive back-end tool flows."

Designer's role

Wipro said its methodology maintains the designer's role while incorporating multiple checks and monitors. "The cost of development of each ASIC is getting higher all the time, so a first-time-right s olution for a customer will be regarded at a premium," Kaundin said.

Wipro said its methodology could be adapted to tools developed by Cadence, Synopsys or Mentor Graphics, or tailored to individual foundries such as Taiwan Semiconductor Manufacturing Co. or United Microelectronics Corp.

The methodology is also being targeted at customers seeking to extend beyond core businesses, such as intellectual-property developers moving into the fabless market or companies willing to outsource design work.

EagleWision is part of Wipro's strategy to become a silicon services company. The company said it has helped design more than 30 ICs and more than 40 pc-boards over the last 18 months for customers that include Alcatel, Texas Instruments, SiliconWave and Teralogic. Wipro is also an approved design center for ARM Ltd., and has a 100 engineers working on ARM-based designs.

The company has also established partnerships with wafer foundries such as TSMC, intellectual property companies such as Parthus, p rocessor vendors like ARM and library vendors like Artisan.