TSMC's 3-nm progress report: Better than expected
By Majeed Ahmad, EDN (March 8, 2023)
TSMC, which vowed to kickstart its 3-nm process node in the second half of 2022, barely made it by cutting the ribbon on this cutting-edge manufacturing node on December 29 at its expanded fabrication unit in Southern Taiwan Science Park (STSP). Nearly six months after Samsung began 3-nm chip production based on gate-all-around (GAA) technology, TSMC has successfully conducted its full-node advance from 5-nm to 3-nm chip manufacturing process based on tried-and-test FinFET transistor architecture.
According to media reports, Apple has secured 100% of the initial supply of N3, TSMC’s first-generation 3-nm process, starting as a baseline. The early reports show that the N3 process yield could be as high as 80%. Next, TSMC plans to move to a more advanced 3-nm version, N3E, in the second half of 2023. That’s when other TSMC customers—AMD, Intel, and Qualcomm—plan to adopt the 3-nm process for their chips.
N3, which uses an ultra-complex process with 24-layer multi-pattern extreme ultraviolet (EUV) lithography, is denser and thus offers higher logic density. On the other hand, N3E, which uses a simpler 19-layer single-pattern technology, is easier to produce and is less expensive. It’ll also use less power and clock higher compared to the baseline N3 process.
To read the full article, click here
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging
- Unveiling the Availability of Industry's First Silicon-Proven 3nm, 24Gbps UCIe™ IP Subsystem with TSMC CoWoS® Technology
- Chips&Media Secures Access to TSMC 3nm Library
- GUC Announces Successful Launch of Industry's First 32G UCIe Silicon on TSMC 3nm and CoWoS Technology
Latest News
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite
- Mosaic SoC raises $3.8M to bring real-time spatial intelligence to every consumer device
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer