RISC-V Exceeding Expectations in AI, China Deployment
By Majeed Ahmad, EETimes | October 24, 2025

RISC-V, the number two processor architecture behind Arm, is growing beyond expectations in artificial intelligence (AI) designs and China deployments. These were among the key trendlines at the RISC-V Summit held on 22-23 October 2025 in Santa Clara, California.
RVA23, ratified in October 2024, was also in the spotlight, being a massive investment in bolstering the RISC-V ecosystem. It pulls together software, tools, and features to help RISC-V architectures evolve in a free and open space. At the summit, RISC-V thought leaders telegraphed their intentions regarding ecosystem development while the community digests RVA23; the next major ecosystem release is clearly years away.
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