Arithmatica Licenses Read Channel Intellectual Property

SAN JOSE, Calif.-- January 21, 2008 -- Arithmatica, the datapath design company, today announced that it has licensed its read channel intellectual property (IP) exclusively to Siglead, a Japanese startup that is developing semiconductors and IP for the hard disk drive industry. Siglead will acquire ownership of Arithmatica’s read channel IP if certain performance milestones are achieved. The two principle engineering resources at Arithmatica that developed the read channel IP will join Siglead. The total value of the licensing is $1.7M.

Arithmatica’s read channel IP is based on its patented double-detector technology that provides greatly improved filtering capability in Viterbi detectors without the typical large increase in gate count and power consumption. Siglead will benefit from using Arithmatica’s double-detector technology in its read channel circuitry by allowing them to increase the capacity of disk drives without increasing the cost of the hardware. The capacity/cost ratio is very important to hard disk drive vendors who are increasingly facing stiff competition from solid-state memory vendors on the low-end.

“One of my initial goals when I joined Arithmatica was to focus the company entirely on EDA,” said Dan Ganousis, CEO of Arithmatica. “Arithmatica was conducting secondary research in advanced decoding algorithms that yielded this double-detector technology. Test results in silicon have confirmed the substantial improvement in filtering capability of our double-detectors, and we are thrilled to have found a viable development partner like Siglead who we feel will have great commercial success in the hard disk drive industry.”

"This is a significant milestone and achievement for Siglead. Arithmatica's read channel IP provides us with a competitive advantage and as a startup we feel we are ideally suited to quickly deliver this innovative detection technology into the hard disk drive market," said Atsushi Esumi, CEO of Siglead.

Arithmatica is the only EDA company focused solely on datapath design automation to reduce power consumption, improve area utilization, and increase performance of datapath intensive ICs. Arithmatica’s tools, IP and services provide competitive benefits for IC designers in media and network processing, cryptography, consumer electronics, and high-performance computing applications. Arithmatica’s patented technology provides differentiated product improvement and accelerated design cycles for datapath design engineers. Arithmatica has customers worldwide including NVidia, AMD/ATI, Atheros Communications, Solarflare Communications, Toshiba, Imagination Technologies, Xilinx, Raza Microelectronics, DMP, Mediatek, and Teranetics.

About Arithmatica

Founded in 1998, Arithmatica is the leader in datapath design automation by providing software tools, IP, and services to IC designers worldwide that allow them to automatically optimize their datapath designs for power, area, and timing. Arithmatica is privately held with venture funding from SPARK Ventures (London) and NIF Ventures (Tokyo). Arithmatica’s products integrate seamlessly into existing IC design flows, supported through membership in the Synopsys Tap-In, the Cadence Connections, the MagmaTies, and the Sequence Design In-Sequence Partners programs. Arithmatica is headquartered in San Jose, Calif., with a research and development center in Warwick, U.K. For further information, please visit www.arithmatica.com.