Movellus Brings Power Optimization IP to Samsung Electronics’ Advanced Nodes
Equips AI and HPC chip designers with on-die power optimization and advanced telemetry IP to unlock next-generation power efficiency.
Santa Clara, California -- August 11, 2026 -- Movellus today announced a collaboration with Samsung Electronics, making its Aeonic® platform for on-die power optimization and telemetry IP available to AI and HPC chip designers through the Samsung Advanced Foundry Ecosystem (SAFE™) Program. Designers can license the IP for Samsung Foundry’s advanced process nodes to manage power and maximize performance for advanced SoC designs.
The Aeonic platform gives AI and HPC designers a complete solution for on-die power control loops. It provides high-resolution telemetry and nanosecond actuators that continuously monitor and resolve transient power events. These capabilities let designers run silicon closer to its performance limits on Samsung Foundry’s advanced processes, with the visibility needed to maintain reliable high performance across the system lifecycle.
“As power management becomes increasingly critical for AI and HPC designs, Samsung Foundry’s 4nm technology combined with Movellus’ Aeonic platform helps customers build more energy-efficient and power-aware SoCs for today’s AI, HPC and data center workloads. Together, we are helping designers accelerate deployment while providing greater visibility into silicon operation and performance.” Ben Rhew, Corporate Vice President and Head of the Foundry IP Development Team, Samsung Electronics
“Power is setting the ceiling for scalability in AI and HPC SoC design. The Aeonic® product family provides designers of advanced SoCs with a new level of control and visibility for their designs to optimize power and performance and improve reliability. Our partnership with SAFE now brings Movellus IP solutions to the broader Samsung Foundry customer base.” Vikram Karvat, Chief Operating Officer, Movellus
Explore Movellus IP:
- On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry
- Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Scalable, On-Die Voltage Regulation
- Integrated Droop Response System
About Movellus
Movellus provides critical power and performance optimization technology integrated into an array of applications, ranging from edge AI devices to performance-centric cloud data center compute and networking offerings. The company is headquartered in Santa Clara, CA, with R&D centers in Michigan and Toronto. Visit us at movellus.com.
Related Semiconductor IP
- On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry
- Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Scalable, On-Die Voltage Regulation
- Integrated Droop Response System
- Advanced On-Die DroopTelemetry
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