MorethanIP releases a new version of its 10/100/1000 Ethernet MAC Core featuring a configurable 8/32-Bit Client interface
May 25, 2003 - MorethanIP releases Version 3.2 of its 10/100/1000 Ethernet MAC Core featuring a configurable 8/32-Bit Client interface for improved system level and embedded processor performance. With Version 3.2 the integration with standard interfaces like PCI, POS-PHY L3 or SPI 4.2 becomes simpler and seamless with an Altera Atlantic compatible FIFO client interface.
For applications that require the implementation of embedded processor (e.g. Routing, Switching, Firewall, Masquerade,...) the 10/100/1000 MAC core is also available with a direct 32-Bit Avalon Bus Interface that provides seamless connectivity to Altera Niostm embedded processor environments. An integration with ARM processor with 32-bit AHB bus is planned.
Related Semiconductor IP
- 100-10Gbps Ethernet MAC Controller
- SD Card Controller
- AXI4 Memory Controller IP Core
- AXI-Lite I2C Controller Core
- LVDS Transceiver IP core
Related News
- CCIX Consortium Releases CCIX Base Specification Revision 1.1 Version 1.0 with Support for 32GT/s
- CAST Introduces MAC-SEC-MG IP Core for Secure 10G+ Ethernet SoC Designs
- MIPS Technologies and TSMC form strategic alliance to deliver "hard" versions of MIPS 32 and 64 Bit Processor Cores
- MorethanIP ships 2nd Generation 10GbE MAC Core
Latest News
- BrainChip Launches AKD1500 Raspberry Pi 5 Kit: Giving Developers a Direct Path from Prototype to Production
- Cadence Joins the Genesis Mission Consortium to Advance AI-Driven Scientific Discovery and Microelectronics Innovation
- Onsemi picks up Codasip’s low-end RISC-V business for $14.5 million
- Semidynamics and Nokia Explore Collaboration to Strengthen Europe’s Sovereign AI Capabilities
- VeriSilicon Introduces GLTiny™ 3D GPU Programming Model for Ultra-Low-Power, Memory-Efficient Wearable Devices