MediaTek Standardizes on Synopsys' HAPS-80 Prototyping System
HAPS-80 Delivers 2X Performance and 2X Capacity Compared to Prior Generation
MOUNTAIN VIEW, Calif., July 26, 2017 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that MediaTek, a leading fabless semiconductor company, has adopted Synopsys' HAPS®-80 prototyping system, part of the Verification Continuum™ Platform, for their broad portfolio of next generation system-on-chips (SoCs). Verification Continuum is built from Synopsys' market-leading and fastest verification technologies providing virtual prototyping, static and formal verification, simulation, verification IP, emulation, prototyping and debug. HAPS-80, the industry's fastest prototyping system, delivers 2X performance and 2X capacity compared to the prior generation, enabling MediaTek to accelerate their software development and system validation tasks. In addition, MediaTek used HAPS ProtoCompiler to automate system partitioning and reduce their time-to-first prototype to weeks.
"As the complexity of SoC designs increases, including the amount of software to support these designs, we require a scalable and high-performance prototyping solution," said SA Hwang, general manager of Design Technology at MediaTek. "Synopsys, with the HAPS-80 prototyping solution, delivers the features our designers and validation teams require to execute a large number of software tests and perform real-world interface testing."
HAPS prototyping is a key part of the Synopsys Verification Continuum platform, which is focused on accelerating the entire verification and software development cycle and enabling faster time-to-market. MediaTek was able to quickly add HAPS to their verification environment and take advantage of HAPS' multi-design mode feature to prototype multiple design instances on HAPS, as well as connect multiple HAPS systems to support large designs. MediaTek also used HAPS ProtoCompiler, with built-in knowledge of the FPGAs used in the HAPS system, to automate system partitioning and accelerate their time-to-first prototype. In addition, MediaTek took advantage of the advanced waveform creation capability of HAPS prototypes to validate their SoC with the Synopsys Verdi® debug solution.
"Industry leaders like MediaTek increasingly require a high-performance prototyping solution to validate the connectivity and performance requirements of their SoCs," said Andrew Dauman, VP of engineering in Verification Group at Synopsys. "We continue our R&D collaboration with market leaders like MediaTek to deliver advanced FPGA-based prototyping hardware and software, focused on accelerating system validation, resulting in faster time-to-market for our customers."
Resources
Learn more about HAPS: http://www.synopsys.com/haps:
- FPGA-based Prototyping Methodology Manual: http://www.synopsys.com/FPMM
- Prototyping blog: http://blogs.synopsys.com/hittingthemark/
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related News
- Synopsys' New HAPS-80 FPGA-Based Prototyping Solution Delivers Up to 100 MHz System Performance
- Synopsys Ships More Than 3,000 HAPS-80 Prototyping Systems
- Synopsys Unveils Industry's First Unified Emulation and Prototyping System Addressing Verification Requirements Across the Chip Development Cycle
- Synopsys and TSMC Streamline Multi-Die System Complexity with Unified Exploration-to-Signoff Platform and Proven UCIe IP on TSMC N3E Process
Latest News
- StarFive and LECARC Forge Partnership to Co-Develop RISC-V Server CPUs and Seize New Opportunities in the Agentic AI Era
- ASICLAND Selected as SK hynix’s Partner for Next-Gen eSSD Development, Establishing a ‘K-Semiconductor Win-Win’ Model
- onsemi to Acquire Synaptics to Enable the Next Generation of Intelligent Systems for Physical AI
- EdgeAI Licensed Andes Technology CPU IP to Power Next-Generation Edge AI Neuromorphic Solution
- Jim Keller: ‘AI Still Obeys the Old Laws of Compute’