Panel ponders many-core ICs tripping 'the singularity'
Peter Clarke, EETimes
3/28/2012 12:09 PM EDT
That was the question put to a panel of some of the best minds in multicore processor theory and design assembled on Tuesday (March 27) by analyst Jon Peddie at the Multicore DevCon, part of DESIGN West being held here this week. A small but enthusiastic audience was there to listen.
To read the full article, click here
Related Semiconductor IP
- UALink PHY + Controller
- General Purpose Low-Dropout (LDO) - TSMC
- Camera Post-Processing IP
- DC-DC Split-Pi Boost-Buck Converter
- Deep learning accelerator
Related News
- Tower aims to ship ICs made on 130-nm process in 2005
- Sarnoff Introduces Silicon Proven ESD Design Tool Kit For ICs, Matched To Specific Foundry Processes
- Sarnoff ESDdoctor(TM) Offers ESD Solutions For New ICs, Trouble-Shoots Problems In Existing Chips
- Epson Licenses Sarnoff's TakeCharge ESD Design IP For High-Voltage Driver ICs Used In LCD Panels
Latest News
- UMC Reports Sales for June 2026
- VeriSilicon Introduces CPP2000 Camera Post-Processing IP for Embodied Robotics and Mobile Vision Applications
- Infineon opens the world's largest fab for power semiconductors and analog/mixed-signal technologies in Dresden
- Tenstorrent Sets New Performance Records, Launches TT- Ascalon S, and Expands Across Japan
- Chips&Media Signs APV codec IP Licensing Deal with North American Big Tech, Establishing the ‘Second Front’ Against Apple’s ProRes