New Intel group will drive system-chip design
Rick Merritt, EE Times
(12/06/2007 10:30 AM EST)
SAN JOSE, Calif. — Intel has created a new system-on-chip enablement group under Gadi Singer, a veteran executive who has led many high profile projects for the company. The move comes at a time when the company is accelerating efforts both in multicore PC processors as well as a range of SoCs for sockets outside its traditional PC markets.
"Every major element being developed going forward will be done in a way that makes it reusable," said Singer who has at various times led efforts on Pentium, Itanium and cellular processors and been head of design automation software at Intel. "We are defining practices, flows and architectures that will allow plug-and-play across all Intel products," he said of the new group.
Intel is not saying how big the new group is in terms of headcount or budget, but its mandate includes defining interconnects and test standards for silicon blocks and system-in-package devices. Singer and others noted making the SoC shift will not be easy for a company with a long heritage of custom design at the circuit level aiming at top performance.
"Developing something that is highly modular requires more effort which sometimes conflicts with other goals for a project so we do get some push back, but this extra effort is a very worthwhile investment," said Singer. "Going forward having SoC capabilities will be part of our competitiveness," he added.
(12/06/2007 10:30 AM EST)
SAN JOSE, Calif. — Intel has created a new system-on-chip enablement group under Gadi Singer, a veteran executive who has led many high profile projects for the company. The move comes at a time when the company is accelerating efforts both in multicore PC processors as well as a range of SoCs for sockets outside its traditional PC markets.
"Every major element being developed going forward will be done in a way that makes it reusable," said Singer who has at various times led efforts on Pentium, Itanium and cellular processors and been head of design automation software at Intel. "We are defining practices, flows and architectures that will allow plug-and-play across all Intel products," he said of the new group.
Intel is not saying how big the new group is in terms of headcount or budget, but its mandate includes defining interconnects and test standards for silicon blocks and system-in-package devices. Singer and others noted making the SoC shift will not be easy for a company with a long heritage of custom design at the circuit level aiming at top performance.
"Developing something that is highly modular requires more effort which sometimes conflicts with other goals for a project so we do get some push back, but this extra effort is a very worthwhile investment," said Singer. "Going forward having SoC capabilities will be part of our competitiveness," he added.
To read the full article, click here
Related Semiconductor IP
- UALink 200G v1.0 Verification IP
- CCSDS SCCC Demapper and Turbo Decoder
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
Related News
- Seligman Ventures Leads Cognichip’s $60M Series A to Back Physics-Informed AI for Chip Design, Intel CEO Lip-Bu Tan and Seligman Ventures’ Umesh Padval Join the Board
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
- proteanTecs Launches Solution for System Production Analytics Based on Chip Telemetry
Latest News
- Marvell, Microsoft and Oracle Establish OCP Working Group to Standardize Data Center Hardware Security
- At GAITA, PUFsecurity Shows How PUFrt and PUF-Based HSMs Give Agentic and Physical AI a Verifiable Root of Trust
- QuickLogic Secures Six-Figure eFPGA IP Contract for Automotive Industrial SoC
- Faraday Powers Intelligent Sensing with New 14nm MIPI C/D Combo PHY IP
- Cadence Wins Five 2026 TSMC OIP Partner of the Year Awards