eASIC Enables 3X Increase in Energy Efficiency for Astrophysical Simulation Supercomputer
Santa Clara, CA – May 2nd, 2012 – eASIC Corporation, a provider of NEW ASIC devices, today announced that Tokyo Institute of Technology, in collaboration with Hitotsubashi University, has successfully demonstrated a 3X increase in energy efficiency for a green supercomputer used for performing astronomical simulations. By leveraging eASIC´s low power Nextreme-2 NEW ASIC devices, Tokyo Institute of Technology was able to achieve an energy efficiency ratio of 6.5 GFLOPS/Watt for its GRAPE-8 supercomputer.
The key component in achieving the highest energy efficiency ratio for the GRAPE-8 system is the use of eASIC´s Nextreme-2 NEW ASIC devices, which are commonly used for replacing FPGAs for high volume and power sensitive applications. Manufactured using a low-power 45nm LP process, and employing single via programming which eliminates the need for power hungry SRAMs that FPGAs require for programming look-up tables and routing, eASIC devices typically enable FPGA users to achieve up to 80% lower power consumption. eASIC´s unique GreenPowerVia technology also enables users to completely turn off any logic and memories that are unused in a design.
"eASIC´s devices have enabled us to take a giant step forward in resolving the power issue with next generation supercomputers," commented Junichiro Makino, Professor at Tokyo Institute of Technology Graduate School of Science and Engineering. "Standard cell ASIC was prohibitively expensive and FPGA power consumption simply could not allow us to beat the previous record of 2.1GFLOPS/Watt which was held by IBM´s BG/Q green supercomputer. eASIC´s NEW ASIC allowed us to achieve a new record of 6.5 GFLOPS/Watt," added Makino.
"This great accomplishment by Junichiro Makino and his team is testament to the innovative power saving technology eASIC has developed," said Jasbinder Bhoot, Vice President of Marketing, eASIC Corporation. "The energy efficiency numbers they are demonstrating are very impressive. In many industries ranging from wireless infrastructure to enterprise storage, we are helping customers overcome the power problems caused by FPGAs. When low-power consumption is paramount, like Tokyo Institute of Technology´s GRAPE-8 processor, eASIC´s Nextreme-2 devices are the ideal choice," added Bhoot.
About eASIC
eASIC is a fabless semiconductor company offering breakthrough NEW ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- eASIC Teams With CAST to Deliver ARM926EJ AMBA Compliant Peripherals for 90nm Nextreme(TM) Structured ASICs
- eASIC and MoreThanIP Partner to Deliver Tri-Mode (10/100/1000) Ethernet MAC Solutions for Nextreme Structured ASICs
- Fukuoka Intelligent Cluster Laboratory Chooses eASIC’s Nextreme Devices for its Unique System-in-Package (SiP) Development
- eASIC and ASIC Architect Partner to Deliver New High-Speed PCI Express and DDR2 Interfaces for Nextreme Structured ASICs
Latest News
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite
- Mosaic SoC raises $3.8M to bring real-time spatial intelligence to every consumer device
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer