Cadence Announces Appointments of R&D and Worldwide Field Operations Leaders
SAN JOSE, Calif. -- Nov 21, 2008
-- Cadence Design Systems, Inc., the leader in global electronic design innovation, today announced the promotion of three senior leaders to executive management positions in R&D and Worldwide Sales and Field Operations. All three positions report to the Interim Office of the Chief Executive.
Chi-Ping Hsu, 53, was named senior vice president of research and development for the Implementation Products Group. Hsu's expanded responsibilities include development of analog design, implementation, and verification; digital implementation and signoff; mixed-signal design and implementation; physical verification; design-for-manufacturing (DFM); and design and analysis of complex PCBs and integrated circuit (IC) packages. Hsu has previously served as chief strategist of products and technologies and corporate vice president and general manager of both synthesis solutions and digital IC implementation. During his tenure, Cadence® grew its presence in the synthesis segment tenfold, and the company made significant quality and technology advancements in digital IC implementation. In addition, Hsu was the visionary for the Cadence Low Power Solution and the primary driver of Power Forward, the industry's leading initiative organization focused on enabling the development of power-efficient ICs and electronic systems. Prior to joining Cadence in 2003, Hsu served as president and chief operating officer of Get2Chip Inc. and before that held executive management positions at Avant! Corporation, where he was responsible for corporate and technology strategy, product development and marketing. Hsu holds a Ph.D. degree in EECS from the University of California, Berkeley, and a BSEE degree from National Taiwan University.
Nimish Modi, 46, was named senior vice president of research and development for the Front End Group with responsibility for products and solutions in the areas of logic design, systems design, verification, SoC IP integration and hardware/software co-validation. Prior to joining Cadence in 2006, Modi spent 18 years at Intel Corporation, where he was most recently a vice president in the Enterprise Platforms Group with responsibility for the company's server CPU development, including the Xeon and Itanium product families. Modi also held various senior R&D and leadership positions as a member of i486, Pentium and Pentium II processor teams, and led the development of Intel's first optimized Celeron processor. Modi holds a Bachelor of Engineering degree in electrical engineering from the University of Bombay and a Masters degree in electrical engineering from Virginia Tech.
Tom Cooley, 46, was named senior vice president of Worldwide Field Operations. As previously announced, Cooley is responsible for worldwide sales, product marketing, and technical field operations. Cooley is an EDA industry veteran with over 23 years of experience in sales and marketing. He joined Cadence in 1995 and has held various positions, including leading the company's sales activities in the regions of North America, Europe, Middle East, Africa and India. Cooley was also instrumental in establishing the Cadence Global Account Program and most recently led the product marketing organization. Prior to Cadence, he held application engineering and sales positions at Cadnetix, Mentor Graphics and Racal-Redac.
"These appointments recognize the excellent talent and experience that exists within Cadence and reinforce the company's commitment to maintaining core technology leadership and focusing on outstanding customer service," said Lip-Bu Tan, interim vice chairman and member of the Interim Office of the Chief Executive. "Chi-Ping, Nimish and Tom each have a deep understanding of our technology, our customers' product development challenges and the importance of customer relationships. In their new roles they will leverage their respective talents, experience and track records of success to benefit the company and our customers."
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence® software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about Cadence and its products and services is available at www.cadence.com.
Related Semiconductor IP
- Mesochronous Bridge for PCIe/CXL
- AI-native GPU
- OpenGMSL Verification IP
- OpenGMSL Leaf IP
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
Related News
- Rambus Completes Sale of PHY IP Assets to Cadence
- Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design
- Cadence to Acquire Intrinsix Corporation from CEVA
- Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process Featuring Next-Generation 224G-LR SerDes IP
Latest News
- SignatureIP Unveils MesoLink, a Mesochronous Bridge for PCIe/CXL Validation
- ICTK Partners with Jiran Security to Drive Post-Quantum Cryptography (PQC) Migration
- S2C Named Andes Technology’s 2026 Partner of the Year
- BrainChip Launches AKD1500 PCIe Card For Edge AI Evaluation Everywhere
- TDK-Micronas adopts Aniah’s AI-powered OneCheck® platform to advance automotive semiconductor development